Insulating film, method for manufacturing semiconductor device, and semiconductor device

ABSTRACT

In a semiconductor device including a transistor including an oxide semiconductor film and a protective film over the transistor, an oxide insulating film containing oxygen in excess of the stoichiometric composition is formed as the protective film under the following conditions: a substrate placed in a treatment chamber evacuated to a vacuum level is held at a temperature higher than or equal to 180° C. and lower than or equal to 260° C.; a source gas is introduced into the treatment chamber so that the pressure in the treatment chamber is set to be higher than or equal to 100 Pa and lower than or equal to 250 Pa; and a high-frequency power higher than or equal to 0.17 W/cm2 and lower than or equal to 0.5 W/cm2 is supplied to an electrode provided in the treatment chamber.

TECHNICAL FIELD

The present invention relates to a method for forming an insulating filmand a method for manufacturing a semiconductor device including afield-effect transistor.

BACKGROUND ART

Transistors used for most flat panel displays typified by a liquidcrystal display device and a light-emitting display device are formedusing silicon semiconductors such as amorphous silicon, single crystalsilicon, and polycrystalline silicon provided over glass substrates.Further, transistors formed using such silicon semiconductors are usedin integrated circuits (ICs) and the like.

In recent years, attention has been drawn to a technique in which,instead of a silicon semiconductor, a metal oxide exhibitingsemiconductor characteristics is used for transistors. Note that in thisspecification, a metal oxide exhibiting semiconductor characteristics isreferred to as an oxide semiconductor.

For example, a technique is disclosed, in which a transistor ismanufactured using zinc oxide or an In—Ga—Zn-based oxide as an oxidesemiconductor and the transistor is used as a switching element or thelike of a pixel of a display device (see Patent Documents 1 and 2).

REFERENCE Patent Document [Patent Document 1] Japanese Published PatentApplication No. 2007-123861 [Patent Document 2] Japanese PublishedPatent Application No. 2007-096055 DISCLOSURE OF INVENTION

In a transistor using an oxide semiconductor, oxygen vacancies (oxygendefects) in an oxide semiconductor film cause defects of electriccharacteristics of the transistor. For example, the threshold voltage ofa transistor using an oxide semiconductor film with oxygen vacancieseasily shifts in the negative direction, and such a transistor tends tobe normally-on. This is because electric charges are generated owing tooxygen vacancies in the oxide semiconductor, and the resistance isreduced.

In addition, a transistor using an oxide semiconductor film with oxygenvacancies has such a problem that the electric characteristics,typically, the threshold voltage, are changed with time or changed by agate bias-temperature (BT) stress test under light.

Thus, an object of one embodiment of the present invention is to reducethe amount of oxygen vacancies contained in an oxide semiconductor usedin a semiconductor device. Further, another object of one embodiment ofthe present invention is to improve electric characteristics of asemiconductor device using an oxide semiconductor.

According to one embodiment of the present invention, an oxideinsulating film containing oxygen more than oxygen satisfying thestoichiometric composition (i.e., containing oxygen in excess of thestoichiometric composition) is formed by a plasma CVD method.

According to one embodiment of the present invention, in a semiconductordevice including a transistor including an oxide semiconductor film anda protective film over the transistor, an oxide insulating filmcontaining oxygen in excess of the stoichiometric composition is formedas the protective film by a plasma CVD method.

According to one embodiment of the present invention, in a semiconductordevice including a transistor including an oxide semiconductor film anda protective film over the transistor, an oxide insulating filmcontaining oxygen in excess of the stoichiometric composition is formedas the protective film under conditions where a substrate placed in atreatment chamber evacuated to a vacuum level is held at a temperaturehigher than or equal to 180° C. and lower than or equal to 260° C., asource gas is introduced into the treatment chamber to set a pressure inthe treatment chamber to be higher than or equal to 100 Pa and lowerthan or equal to 250 Pa, and a high-frequency power higher than or equalto 0.17 W/cm² and lower than or equal to 0.5 W/cm² is supplied to anelectrode provided in the treatment chamber.

According to one embodiment of the present invention, in a semiconductordevice including a transistor including an oxide semiconductor film anda protective film over the transistor, an oxide insulating filmcontaining oxygen in excess of the stoichiometric composition is formedas the protective film under conditions where a substrate placed in atreatment chamber evacuated to a vacuum level is held at a temperaturehigher than or equal to 180° C. and lower than or equal to 260° C., asource gas is introduced into the treatment chamber to set a pressure inthe treatment chamber to be higher than or equal to 100 Pa and lowerthan or equal to 250 Pa, and a high-frequency power higher than or equalto 0.17 W/cm² and lower than or equal to 0.5 W/cm² is supplied to anelectrode provided in the treatment chamber; and then heat treatment isperformed so that oxygen contained in the protective film is diffused tothe oxide semiconductor film.

Further, in one embodiment of the present invention, a transistor whichincludes a gate electrode, an oxide semiconductor film overlapping withpart of the gate electrode with a gate insulating film interposedtherebetween, and a pair of electrodes in contact with the oxidesemiconductor film, and a protective film is provided over the oxidesemiconductor film. The protective film is an oxide insulating film inwhich the spin density of a signal at g=2.001, measured by electron spinresonance, is lower than 1.5×10¹⁸ spins/cm³.

Note that the pair of electrodes is provided between the gate insulatingfilm and the oxide semiconductor film. Alternatively, the pair ofelectrodes is provided between the oxide semiconductor film and theprotective film.

Further, one embodiment of the present invention is a semiconductordevice which includes a transistor including an oxide semiconductorfilm, a pair of electrodes in contact with the oxide semiconductor film,a gate insulating film over the oxide semiconductor film, and a gateelectrode overlapping with part of the oxide semiconductor film with thegate insulating film interposed therebetween and a protective filmcovering the gate insulating film and the gate electrode. The protectivefilm is an oxide insulating film in which the spin density of a signalat g=2.001, measured by electron spin resonance, is lower than 1.5×10¹⁸spins/cm³.

In a transistor including an oxide semiconductor, an oxide insulatingfilm containing oxygen in excess of the stoichiometric composition isformed as a protective film formed over the transistor, and the oxygenin the protective film is diffused to the oxide semiconductor film, sothat the amount of oxygen vacancies contained in the oxide semiconductorfilm can be reduced. Therefore, according to one embodiment of thepresent invention, a semiconductor device having excellent electriccharacteristics can be provided.

BRIEF DESCRIPTION OF DRAWINGS

FIGS. 1A to 1C are a top view and cross-sectional views illustrating oneembodiment of a transistor.

FIGS. 2A to 2D are cross-sectional views illustrating one embodiment ofa method for manufacturing a transistor.

FIG. 3 is a cross-sectional view illustrating one embodiment of atransistor.

FIGS. 4A to 4E are cross-sectional views illustrating one embodiment ofa method for manufacturing a transistor.

FIGS. 5A to 5C are a top view and cross-sectional views illustrating oneembodiment of a transistor.

FIGS. 6A to 6D are cross-sectional views illustrating one embodiment ofa method for manufacturing a transistor.

FIGS. 7A and 7B are a top view and a cross-sectional view illustratingone embodiment of a transistor.

FIGS. 8A and 8B are a top view and a cross-sectional view illustratingone embodiment of a transistor.

FIGS. 9A to 9C are cross-sectional views each illustrating oneembodiment of a transistor.

FIG. 10 is a cross-sectional view illustrating one embodiment of atransistor.

FIGS. 11A and 11B are cross-sectional views each illustrating oneembodiment of a transistor.

FIG. 12 is a cross-sectional view illustrating one embodiment of atransistor.

FIG. 13 is a cross-sectional view illustrating one embodiment of asemiconductor device.

FIGS. 14A and 14B are circuit diagrams each illustrating one embodimentof a semiconductor device.

FIG. 15 is a block diagram illustrating one embodiment of asemiconductor device.

FIG. 16 is a block diagram illustrating one embodiment of asemiconductor device.

FIG. 17 is a block diagram illustrating one embodiment of asemiconductor device.

FIG. 18 is a graph showing results of TDS analysis of manufacturedsamples.

FIGS. 19A and 19B are graphs showing the number of released oxygenmolecules from manufactured samples.

FIGS. 20A and 20B are graphs showing results of TDS analysis ofmanufactured samples.

FIG. 21 is a graph showing a relation between power and the number ofspins per unit area of manufactured samples.

FIG. 22 is a graph showing a relation between the flow rate of silaneand the number of spins per unit area of manufactured samples.

FIG. 23 is a graph showing results of CPM measurement of manufacturedsamples.

FIGS. 24A and 24B show initial characteristics of current-voltagecharacteristics of manufactured samples.

FIGS. 25A to 25D show initial characteristics of current-voltagecharacteristics of manufactured samples.

FIG. 26 illustrates a MOS element used for C-V measurement.

FIGS. 27A to 27D show results of C-V measurement of manufacturedsamples.

FIGS. 28A to 28D show results of ESR measurement of manufacturedsamples.

FIG. 29 shows a relation between the defect density and the amount ofhysteresis of manufactured samples.

BEST MODE FOR CARRYING OUT THE INVENTION

Hereinafter, embodiments of the present invention will be described indetail with reference to the accompanying drawings. However, the presentinvention is not limited to the following description and it is easilyunderstood by those skilled in the art that the mode and details can bevariously changed without departing from the scope and spirit of thepresent invention. Therefore, the present invention should not beinterpreted as being limited to the description of the embodiments. Inaddition, in the following embodiments and examples, the same portionsor portions having similar functions are denoted by the same referencenumerals or the same hatching patterns in different drawings, anddescription thereof will not be repeated.

Note that in each drawing described in this specification, the size, thefilm thickness, or the region of each component is exaggerated forclarity in some cases. Therefore, embodiments of the present inventionare not limited to such scales.

Note that terms such as “first”, “second”, and “third” in thisspecification are used in order to avoid confusion among components, andthe terms do not limit the components numerically. Therefore, forexample, the term “first” can be replaced with the term “second”,“third”, or the like as appropriate.

Functions of a “source” and a “drain” are sometimes replaced with eachother when the direction of current flowing is changed in circuitoperation, for example.

In this specification, in the case where an etching step is performedafter a photolithography step, a mask formed by the photolithographystep is removed.

Embodiment 1

In this embodiment, a semiconductor device which is one embodiment ofthe present invention, and a method for manufacturing the semiconductordevice will be described with reference to drawings.

FIGS. 1A to 1C are a top view and cross-sectional views of a transistor10 included in a semiconductor device. FIG. 1A is a top view of thetransistor 10, FIG. 1B is a cross-sectional view taken alongdashed-dotted line A-B in FIG. 1A, and FIG. 1C is a cross-sectional viewtaken along dashed-dotted line C-D in FIG. 1A. Note that in FIG. 1A,some components of the transistor 10 (e.g., a substrate 11, a baseinsulating film 13, and a gate insulating film 17), a protective film23, and the like are not illustrated for simplicity.

The transistor 10 illustrated in FIGS. 1B and 1C includes a gateelectrode 15 over the base insulating film 13, the gate insulating film17 over the base insulating film 13 and the gate electrode 15, an oxidesemiconductor film 19 overlapping with the gate electrode 15 with thegate insulating film 17 interposed therebetween, and a pair ofelectrodes 21 in contact with the oxide semiconductor film 19. Inaddition, the protective film 23 covering the gate insulating film 17,the oxide semiconductor film 19, and the pair of electrodes 21 isprovided.

The protective film 23 provided over the transistor 10 shown in thisembodiment is an oxide insulating film containing oxygen in excess ofthe stoichiometric composition. It is preferable that the protectivefilm 23 contain a larger amount of oxygen than that of oxygen vacanciesin the oxide semiconductor film 19. Such an oxide insulating filmcontaining oxygen in excess of the stoichiometric composition is anoxide insulating film from which part of oxygen is released by heating.Thus, when the oxide insulating film from which part of oxygen isreleased by heating is provided as the protective film 23, oxygen isdiffused into the oxide semiconductor film 19 by performing heattreatment, so that oxygen vacancies in the oxide semiconductor film 19can be filled. As a result, the amount of oxygen vacancies in the oxidesemiconductor film 19 is reduced, the threshold voltage of thetransistor can be prevented from shifting in the negative direction.Further, a shift in the threshold voltage with time or a shift in thethreshold voltage due to a gate BT stress under light is small; thus,the transistor can have excellent electric characteristics.

In the transistor 10, some oxygen contained in the protective film 23directly transfers to the oxide semiconductor film 19, and further someoxygen in a region where the gate insulating film 17 is in contact withthe protective film 23 transfers to the oxide semiconductor film 19through the gate insulating film 17.

Further, as for the protective film 23, the spin density of a signal atg=2.001, measured by electron spin resonance, is preferably lower than1.5×10¹⁸ spins/cm³, further preferably lower than or equal to 1.0×10¹⁸spins/cm³. When the spin density of the protective film 23 is within theabove range, defects at the interface between the oxide semiconductorfilm 19 and the protective film 23 and defects in the protective film 23can be reduced; electron traps in such regions can be reduced. As aresult, as electric characteristics of the transistor, the risingvoltage of the on-state current is the substantially same even when thedrain voltage varies. In other words, a transistor with excellentelectric characteristics can be provided. Note that the above spindensity of the protective film 23 is a value obtained after heattreatment.

As the protective film 23, a silicon oxide film, a silicon oxynitridefilm, or the like can be formed to have a thickness greater than orequal to 30 nm and less than or equal to 500 nm, preferably greater thanor equal to 100 nm and less than or equal to 400 nm.

Other details of the transistor 10 are described below.

There is no particular limitation on the property of a material and thelike of the substrate 11 as long as the material has heat resistanceenough to withstand at least heat treatment to be performed later. Forexample, a glass substrate, a ceramic substrate, a quartz substrate, asapphire substrate, or the like may be used as the substrate 11.Alternatively, a single crystal semiconductor substrate or apolycrystalline semiconductor substrate made of silicon, siliconcarbide, or the like, a compound semiconductor substrate made of silicongermanium or the like, an SOI substrate, or the like may be used as thesubstrate 11. Furthermore, any of these substrates further provided witha semiconductor element may be used as the substrate 11.

Still further alternatively, a flexible substrate may be used as thesubstrate 11, and the base insulating film 13 and the transistor 10 maybe provided directly on the flexible substrate. Alternatively, aseparation layer may be provided between the substrate 11 and the baseinsulating film 13. The separation layer can be used when part or thewhole of a semiconductor device formed over the separation layer isseparated from the substrate 11 and transferred onto another substrate.In such a case, the transistor 10 can be transferred to a substratehaving low heat resistance or a flexible substrate as well.

Typical examples of the base insulating film 13 are films of siliconoxide, silicon oxynitride, silicon nitride, silicon nitride oxide,gallium oxide, hafnium oxide, yttrium oxide, aluminum oxide, aluminumoxynitride, and the like. When silicon nitride, gallium oxide, hafniumoxide, yttrium oxide, aluminum oxide, or the like is used for the baseinsulating film 13, diffusion of impurities such as alkali metal, water,or hydrogen from the substrate 11 to the oxide semiconductor film 19 canbe suppressed.

The gate electrode 15 can be formed using a metal element selected fromaluminum, chromium, copper, tantalum, titanium, molybdenum, andtungsten; an alloy containing any of these metal elements as acomponent; an alloy film containing these metal elements in combination;or the like. Further, one or more metal elements selected from manganeseand zirconium may be used. Further, the gate electrode 15 may have asingle-layer structure or a stacked structure of two or more layers. Forexample, a single-layer structure of an aluminum film containingsilicon, a two-layer structure in which a titanium film is stacked overan aluminum film, a two-layer structure in which a titanium film isstacked over a titanium nitride film, a two-layer structure in which atungsten film is stacked over a titanium nitride film, a two-layerstructure in which a tungsten film is stacked over a tantalum nitridefilm or a tungsten nitride film, a three-layer structure in which atitanium film, an aluminum film, and a titanium film are stacked in thisorder, and the like can be given. Alternatively, a film, an alloy film,or a nitride film which contains aluminum and one or more elementsselected from titanium, tantalum, tungsten, molybdenum, chromium,neodymium, and scandium may be used.

The gate electrode 15 can also be formed using a light-transmittingconductive material such as indium tin oxide, indium oxide containingtungsten oxide, indium zinc oxide containing tungsten oxide, indiumoxide containing titanium oxide, indium tin oxide containing titaniumoxide, indium zinc oxide, or indium tin oxide to which silicon oxide isadded. It is also possible to have a stacked-layer structure formedusing the above light-transmitting conductive material and the abovemetal element.

Further, between the gate electrode 15 and the gate insulating film 17,an In—Ga—Zn-based oxynitride semiconductor film, an In—Sn-basedoxynitride semiconductor film, an In—Ga-based oxynitride semiconductorfilm, an In—Zn-based oxynitride semiconductor film, a Sn-basedoxynitride semiconductor film, an In-based oxynitride semiconductorfilm, a film of a metal nitride (such as InN or ZnN), or the like ispreferably provided. These films each have a work function higher thanor equal to 5 eV, preferably higher than or equal to 5.5 eV, which ishigher than the electron affinity of the oxide semiconductor. Thus, thethreshold voltage of the transistor including an oxide semiconductor canbe a positive value, and a so-called normally-off switching element canbe achieved. For example, in the case of using an In—Ga—Zn-basedoxynitride semiconductor film, the In—Ga—Zn-based oxynitridesemiconductor film preferably has a nitrogen concentration at leasthigher than that of the oxide semiconductor film 19; specifically, theIn—Ga—Zn-based oxynitride semiconductor film preferably has a nitrogenconcentration higher than or equal to 7 at. %.

As the gate insulating film 17, a single layer or a stacked layer usingone or more of silicon oxide, silicon oxynitride, silicon nitride oxide,silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, aGa—Zn-based metal oxide, and the like can be used. In the gateinsulating film 17, an oxide insulating film from which oxygen isreleased by heating may be used to be in contact with the oxidesemiconductor film 19. With use of a film from which oxygen is releasedby heating as the gate insulating film 17, the interface state densityat the interface between the oxide semiconductor film 19 and the gateinsulating film 17 can be reduced. Thus, a transistor with lessdeterioration in electric characteristics can be obtained. Further, whenan insulating film which blocks oxygen, hydrogen, water, and the like isprovided on the gate electrode side in the gate insulating film 17,oxygen can be prevented from diffusing from the oxide semiconductor film19 to the outside, and hydrogen and water can be prevented from enteringthe oxide semiconductor film 19 from the outside. As the insulating filmwhich can block oxygen, hydrogen, water, and the like, an aluminum oxidefilm, an aluminum oxynitride film, a gallium oxide film, a galliumoxynitride film, a yttrium oxide film, a yttrium oxynitride film, ahafnium oxide film, a hafnium oxynitride film, or the like can be given.

The gate insulating film 17 may be formed using a high-k material suchas hafnium silicate (HfSiO_(x)), hafnium silicate to which nitrogen isadded (HfSi_(x)O_(y)N_(z)), hafnium aluminate to which nitrogen is added(HfAl_(x)O_(y)N_(z)), hafnium oxide, or yttrium oxide, so that gateleakage current of the transistor can be reduced.

The thickness of the gate insulating film 17 is greater than or equal to5 nm and less than or equal to 400 nm, preferably greater than or equalto 10 nm and less than or equal to 300 nm, further preferably greaterthan or equal to 50 nm and less than or equal to 250 nm.

The oxide semiconductor film 19 preferably contains at least indium (In)or zinc (Zn). Alternatively, the oxide semiconductor film 19 preferablycontains both In and Zn. In order to reduce variation in electricalcharacteristics of the transistors including the oxide semiconductorfilm, the oxide semiconductor film 19 preferably contains one or more ofstabilizers in addition to In or Zn.

As a stabilizer, gallium (Ga), tin (Sn), hafnium (Hf), aluminum (Al),zirconium (Zr), and the like can be given. As another stabilizer,lanthanoid such as lanthanum (La), cerium (Ce), praseodymium (Pr),neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium(Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm),ytterbium (Yb), or lutetium (Lu) can be given.

As the oxide semiconductor, for example, a single-component metal oxidesuch as an indium oxide, a tin oxide, or a zinc oxide; a two-componentmetal oxide such as an In—Zn-based metal oxide, a Sn—Zn-based metaloxide, an Al—Zn-based metal oxide, a Zn—Mg-based metal oxide, aSn—Mg-based metal oxide, an In—Mg-based metal oxide, or an In—Ga-basedmetal oxide; a three-component metal oxide such as an In—Ga—Zn-basedmetal oxide (also referred to as IGZO), an In—Al—Zn-based metal oxide,an In—Sn—Zn-based metal oxide, a Sn—Ga—Zn-based metal oxide, anAl—Ga—Zn-based metal oxide, a Sn—Al—Zn-based metal oxide, anIn—Hf—Zn-based metal oxide, an In—La—Zn-based metal oxide, anIn—Ce—Zn-based metal oxide, an In—Pr—Zn-based metal oxide, anIn—Nd—Zn-based metal oxide, an In—Sm—Zn-based metal oxide, anIn—Eu—Zn-based metal oxide, an In—Gd—Zn-based metal oxide, anIn—Tb—Zn-based metal oxide, an In—Dy—Zn-based metal oxide, anIn—Ho—Zn-based metal oxide, an In—Er—Zn-based metal oxide, anIn—Tm—Zn-based metal oxide, an In—Yb—Zn-based metal oxide, or anIn—Lu—Zn-based metal oxide; or a four-component metal oxide such as anIn—Sn—Ga—Zn-based metal oxide, an In—Hf—Ga—Zn-based metal oxide, anIn—Al—Ga—Zn-based metal oxide, an In—Sn—Al—Zn-based metal oxide, anIn—Sn—Hf—Zn-based metal oxide, or an In—Hf—Al—Zn-based metal oxide canbe used.

For the above-listed metal oxides, an In—Ga—Zn-based metal oxide, forexample, is an oxide whose main components are In, Ga, and Zn, and thereis no particular limitation on the ratio of In:Ga:Zn. The In—Ga—Zn-basedoxide may contain a metal element other than the In, Ga, and Zn.

Alternatively, a material represented by InMO₃(ZnO)_(m) (m>0 issatisfied, and m is not an integer) may be used as an oxidesemiconductor. Note that M represents one or more metal elementsselected from Ga, Fe, Mn, and Co. Alternatively, as the oxidesemiconductor, a material represented by a chemical formula,In₂SnO₅(ZnO)_(n) (n>0, n is a natural number) may be used.

For example, an In—Ga—Zn-based metal oxide with an atomic ratio ofIn:Ga:Zn=1:1:1 (=⅓:⅓:⅓), In:Ga:Zn=2:2:1 (=⅖:⅖:⅕), In:Ga:Zn=3:1:1(=½:⅙:⅓), or an oxide with an atomic ratio close to the above atomicratios can be used. Alternatively, an In—Sn—Zn-based metal oxide with anatomic ratio of In:Sn:Zn=1:1:1 (=⅓:⅓:⅓), In:Sn:Zn=2:1:3 (=⅓:⅙:½), orIn:Sn:Zn=2:1:5 (=¼:⅛:⅝), or an oxide with an atomic ratio close to theabove atomic ratios may be used. Note that a proportion of each atom inthe atomic ratio of the metal oxide varies within a range of ±20% as anerror.

However, without limitation to the materials given above, a materialwith an appropriate composition may be used depending on neededsemiconductor characteristics and electric characteristics (e.g.,field-effect mobility, the threshold voltage, and the like). In order toobtain necessary semiconductor characteristics and electriccharacteristics, it is preferable that the carrier density, the impurityconcentration, the defect density, the atomic ratio of a metal elementto oxygen, the interatomic distance, the density, and the like be set tobe appropriate.

For example, high mobility can be obtained relatively easily in the casewhere the In—Sn—Zn-based metal oxide is used. However, the mobility canbe increased by reducing the defect density in the bulk also in the casewhere the In—Ga—Zn-based metal oxide is used.

Further, the energy gap of a metal oxide that can form the oxidesemiconductor film 19 is greater than or equal to 2 eV, preferablygreater than or equal to 2.5 eV, further preferably greater than orequal to 3 eV. In this manner, the off-state current of a transistor canbe reduced by using an oxide semiconductor having a wide energy gap.

Note that the oxide semiconductor film 19 may have an amorphousstructure, a single crystal structure, or a polycrystalline structure.

The oxide semiconductor film 19 may be in a non-single-crystal state,for example. The non-single-crystal state is, for example, structured byat least one of c-axis aligned crystal (CAAC), polycrystal,microcrystal, and an amorphous part. The density of defect states of anamorphous part is higher than those of microcrystal and CAAC. Thedensity of defect states of microcrystal is higher than that of CAAC.Note that an oxide semiconductor including CAAC is referred to as aCAAC-OS (c-axis aligned crystal oxide semiconductor). In the CAAC-OS,for example, c-axes are aligned, and a-axes and/or b-axes are notmacroscopically aligned.

For example, the oxide semiconductor film 19 may include microcrystal.Note that an oxide semiconductor including microcrystal is referred toas a microcrystalline oxide semiconductor. A microcrystalline oxidesemiconductor film includes microcrystal (also referred to asnanocrystal) with a size greater than or equal to 1 nm and less than 10nm, for example.

For example, an oxide semiconductor film 19 may include an amorphouspart. Note that an oxide semiconductor including an amorphous part isreferred to as an amorphous oxide semiconductor. An amorphous oxidesemiconductor film, for example, has disordered atomic arrangement andno crystalline component. Alternatively, an amorphous oxidesemiconductor film is, for example, absolutely amorphous and has nocrystal part.

Note that the oxide semiconductor film 19 may be a mixed film includingany of a CAAC-OS, a microcrystalline oxide semiconductor, and anamorphous oxide semiconductor. The mixed film, for example, includes aregion of an amorphous oxide semiconductor, a region of amicrocrystalline oxide semiconductor, and a region of a CAAC-OS.Further, the mixed film may have a stacked structure including a regionof an amorphous oxide semiconductor, a region of a microcrystallineoxide semiconductor, and a region of a CAAC-OS, for example.

Note that the oxide semiconductor film 19 may be in a single-crystalstate, for example. An oxide semiconductor film preferably includes aplurality of crystal parts. In each of the crystal parts, a c-axis ispreferably aligned in a direction parallel to a normal vector of asurface where the oxide semiconductor film is formed or a normal vectorof a surface of the oxide semiconductor film. Note that, among crystalparts, the directions of the a-axis and the b-axis of one crystal partmay be different from those of another crystal part. An example of suchan oxide semiconductor film is a CAAC-OS film.

Details of the CAAC-OS film are described. Note that in most cases, acrystal part in the CAAC-OS film fits inside a cube whose one side isless than 100 nm. In an image obtained with a transmission electronmicroscope (TEM), a boundary between crystal parts in the CAAC-OS filmis not clearly detected. Further, with the TEM, a grain boundary in theCAAC-OS film is not clearly found. Thus, in the CAAC-OS film, areduction in electron mobility due to the grain boundary is suppressed.

In each of the crystal parts included in the CAAC-OS film, for example,a c-axis is aligned in a direction parallel to a normal vector of asurface where the CAAC-OS film is formed or a normal vector of a surfaceof the CAAC-OS film. Further, in each of the crystal parts, metal atomsare arranged in a triangular or hexagonal configuration when seen fromthe direction perpendicular to the a-b plane, and metal atoms arearranged in a layered manner or metal atoms and oxygen atoms arearranged in a layered manner when seen from the direction perpendicularto the c-axis. Note that, among crystal parts, the directions of thea-axis and the b-axis of one crystal part may be different from those ofanother crystal part. In this specification, a term “perpendicular”includes a range from 800 to 100°, preferably from 85° to 95°. Inaddition, a term “parallel” includes a range from −10° to 10°,preferably from −5° to 5°.

In the CAAC-OS film, distribution of crystal parts is not necessarilyuniform. For example, in the formation process of the CAAC-OS film, inthe case where crystal growth occurs from a surface side of the oxidesemiconductor film, the proportion of crystal parts in the vicinity ofthe surface of the oxide semiconductor film is higher than that in thevicinity of the surface where the oxide semiconductor film is formed insome cases. Further, when an impurity is added to the CAAC-OS film,crystallinity of the crystal part in a region to which the impurity isadded is reduced in some cases.

Since the c-axes of the crystal parts included in the CAAC-OS film arealigned in the direction parallel to a normal vector of a surface wherethe CAAC-OS film is formed or a normal vector of a surface of theCAAC-OS film, the directions of the c-axes may be different from eachother depending on the shape of the CAAC-OS film (the cross-sectionalshape of the surface where the CAAC-OS film is formed or thecross-sectional shape of the surface of the CAAC-OS film). Note that thefilm deposition is accompanied with the formation of the crystal partsor followed by the formation of the crystal parts throughcrystallization treatment such as heat treatment. Hence, the c-axes ofthe crystal parts are aligned in the direction parallel to a normalvector of the surface where the CAAC-OS film is formed or a normalvector of the surface of the CAAC-OS film.

With the use of the CAAC-OS film in a transistor, change in electriccharacteristics of the transistor due to irradiation with visible lightor ultraviolet light is small. Thus, the transistor has highreliability.

Alternatively, the oxide semiconductor film 19 may have a stacked-layerstructure of a plurality of oxide semiconductor films. For example, theoxide semiconductor film 19 may be a stack of a first oxidesemiconductor film and a second oxide semiconductor film that are formedusing metal oxides with different compositions. For example, the firstoxide semiconductor film may be formed using any of two-component metaloxide, a three-component metal oxide, and a four-component metal oxide,and the second oxide semiconductor film may be formed using any of thesewhich is different from the oxide for the first oxide semiconductorfilm.

Further, the constituent elements of the first oxide semiconductor filmand the second oxide semiconductor film are made to be the same and thecomposition of the constituent elements of the first oxide semiconductorfilm and the second oxide semiconductor film may be made to bedifferent. For example, the first oxide semiconductor film may have anatomic ratio of In:Ga:Zn=1:1:1, and the second oxide semiconductor filmmay have an atomic ratio of In:Ga:Zn=3:1:2. Alternatively, the firstoxide semiconductor film may have an atomic ratio of In:Ga:Zn=1:3:2, andthe second oxide semiconductor film may have an atomic ratio ofIn:Ga:Zn=2:1:3. Note that a proportion of each atom in the atomic ratioof the oxide semiconductor varies within a range of ±20% as an error.

At this time, one of the first oxide semiconductor film and the secondoxide semiconductor film which is closer to the gate electrode (i.e.,which is on a channel side) preferably contains In and Ga at aproportion of In>Ga. The other which is farther from the gate electrodelayer (i.e., which is on a back channel side) preferably contains In andGa at a proportion of In Ga.

In an oxide semiconductor, the s orbital of heavy metal mainlycontributes to carrier transfer, and when the In content in the oxidesemiconductor is increased, overlap of the s orbitals is likely to beincreased. Therefore, an oxide having a composition of In>Ga has highermobility than an oxide having a composition of In Ga. Further, in Ga,the formation energy of oxygen vacancy is larger and thus oxygen vacancyis less likely to occur, than in In; therefore, the oxide having acomposition of In Ga has more stable characteristics than the oxidehaving a composition of In>Ga.

An oxide semiconductor containing In and Ga at a proportion of In>Ga isused on a channel side, and an oxide semiconductor containing In and Gaat a proportion of In Ga is used on a back channel side; so thatfield-effect mobility and reliability of a transistor can be furtherimproved.

Further, oxide semiconductors having different crystallinities may beused for the first oxide semiconductor film and the second oxidesemiconductor film. That is, the oxide semiconductor film may be formedusing any of a single crystal oxide semiconductor film, apolycrystalline oxide semiconductor film, a microcrystalline oxidesemiconductor film, an amorphous oxide semiconductor film, and a CAAC-OSfilm, as appropriate. When an amorphous oxide semiconductor is used forat least one of the first oxide semiconductor film and the second oxidesemiconductor film, internal stress or external stress of the oxidesemiconductor film 19 is relieved, variation in characteristics of atransistor is reduced, and reliability of the transistor can be furtherimproved.

The thickness of the oxide semiconductor film 19 is greater than orequal to 1 nm and less than or equal to 100 nm, preferably greater thanor equal to 1 nm and less than or equal to 50 nm, further preferably,greater than or equal to 1 nm and less than or equal to 30 nm, stillfurther preferably greater than or equal to 3 nm and less than or equalto 20 nm.

The concentration of alkali metals or alkaline earth metals in the oxidesemiconductor film 19 is preferably lower than or equal to 1×10¹⁸atoms/cm³, further preferably lower than or equal to 2×10¹⁶ atoms/cm³.This is because an alkali metal and an alkaline earth metal are bondedto an oxide semiconductor to generate carriers in some cases, whichcauses an increase in off-state current of the transistor.

The oxide semiconductor film 19 may contain nitrogen at a concentrationlower than or equal to 5×10¹⁸ atoms/cm³.

The pair of electrodes 21 are formed to have a single-layer structure ora stacked-layer structure including, as a conductive material, any ofmetals such as aluminum, titanium, chromium, nickel, copper, yttrium,zirconium, molybdenum, silver, tantalum, and tungsten or an alloycontaining any of these metals as a main component. For example, asingle-layer structure of an aluminum film containing silicon, atwo-layer structure in which a titanium film is stacked over an aluminumfilm, a two-layer structure in which a titanium film is stacked over atungsten film, a two-layer structure in which a copper film is formedover a copper-magnesium-aluminum alloy film, a three-layer structure inwhich a titanium film or a titanium nitride film, an aluminum film or acopper film, and a titanium film or a titanium nitride film are stackedin this order, a three-layer structure in which a molybdenum film or amolybdenum nitride film, an aluminum film or a copper film, and amolybdenum film or a molybdenum nitride film are stacked in this order,and the like can be given. Note that a transparent conductive materialcontaining indium oxide, tin oxide, or zinc oxide may be used.

Although the pair of electrodes 21 is provided between the oxidesemiconductor film 19 and the protective film 23 in this embodiment, thepair of electrodes 21 may be provided between the gate insulating film17 and the oxide semiconductor film 19.

Next, a method for manufacturing the transistor illustrated in FIGS. 1Ato 1C will be described with reference to FIGS. 2A to 2D.

As illustrated in FIG. 2A, the base insulating film 13 and the gateelectrode 15 are formed over the substrate 11, and the gate insulatingfilm 17 is formed over the gate electrode 15. Next, an oxidesemiconductor film 18 is formed over the gate insulating film 17.

The base insulating film 13 is formed by a sputtering method, a CVDmethod, or the like. Here, a 100-nm-thick silicon oxynitride film isformed by a CVD method.

A method for forming the gate electrode 15 is described below. First, aconductive film is formed by a sputtering method, a CVD method, anevaporation method, or the like. A mask is formed by a photolithographystep over the conductive film. Next, with use of the mask, part of theconductive film is etched, so that the gate electrode 15 is formed.After that, the mask is removed.

Note that the gate electrode 15 may be formed by an electrolytic platingmethod, a printing method, an inkjet method, or the like, instead of theabove formation method.

Here, a 100-nm-thick tungsten film is formed by a sputtering method.Next, a mask is formed by a photolithography step, and the tungsten filmis dry-etched with use of the mask to form the gate electrode 15.

The gate insulating film 17 is formed by a sputtering method, a CVDmethod, an evaporation method, or the like.

Here, a 50-nm-thick silicon nitride film is formed by a CVD method, andthen a 200-nm-thick silicon oxynitride film is formed by a CVD method,whereby the gate insulating film 17 is formed.

The oxide semiconductor film 18 is formed by a sputtering method, acoating method, a pulsed laser deposition method, a laser ablationmethod, or the like.

In the case where the oxide semiconductor film 18 is formed by asputtering method, as a power supply device for generating plasma, an RFpower supply device, an AC power supply device, a DC power supplydevice, or the like can be used as appropriate.

As a sputtering gas, a rare gas (typically argon), an oxygen gas, or amixed gas atmosphere of a rare gas and oxygen is used as appropriate. Inthe case of using the mixed gas of a rare gas and oxygen, the proportionof oxygen is preferably higher than that of a rare gas.

Further, a target may be selected as appropriate in accordance withcomposition of the oxide semiconductor film 18 to be formed.

For example, in the case where the oxide semiconductor film 18 is formedby a sputtering method, deposition is performed at a substratetemperature higher than or equal to 150° C. and lower than or equal to750° C., preferably higher than or equal to 150° C. and lower than orequal to 450° C., further preferably higher than or equal to 200° C. andlower than or equal to 350° C. to form the oxide semiconductor film 18,whereby a CAAC-OS film can be formed.

The CAAC-OS film is formed by, for example, a sputtering method using anoxide semiconductor sputtering target which is a polycrystal. When ionscollide with the sputtering target, a crystal region included in thesputtering target may be separated from the target along an a-b plane;in other words, a sputtered particle having a plane parallel to an a-bplane (flat-plate-like sputtered particle or pellet-like sputteredparticle) may flake off from the sputtering target. In that case, theflat-plate-like sputtered particle reaches a substrate while maintainingtheir crystal state, whereby the CAAC-OS film can be formed.

For the deposition of the CAAC-OS film, the following conditions arepreferably used.

By reducing the amount of impurities entering the CAAC-OS film duringthe deposition, the crystal state can be prevented from being broken bythe impurities. For example, the concentration of impurities (e.g.,hydrogen, water, carbon dioxide, or nitrogen) which exist in thedeposition chamber may be reduced. Furthermore, the concentration ofimpurities in a deposition gas may be reduced. Specifically, adeposition gas whose dew point is −80° C. or lower, preferably −100° C.or lower is used.

By increasing the substrate heating temperature during the deposition,migration of a sputtered particle is likely to occur after the sputteredparticle reaches a substrate surface. Specifically, the substrateheating temperature during the deposition is higher than or equal to100° C. and lower than a strain point of the substrate, preferablyhigher than or equal to 200° C. and lower than or equal to 500° C. Byincreasing the substrate heating temperature during the deposition, whenthe flat-plate-like sputtered particle reaches the substrate, migrationoccurs on the substrate surface, so that a flat plane of theflat-plate-like sputtered particle is attached to the substrate.

Furthermore, it is preferable that the proportion of oxygen in thedeposition gas be increased and the power be optimized in order toreduce plasma damage at the deposition. The proportion of oxygen in thedeposition gas is 30 vol % or higher, preferably 100 vol %.

As an example of the sputtering target, an In—Ga—Zn-based metal oxidetarget is described below.

The In—Ga—Zn-based metal oxide target, which is polycrystalline, is madeby mixing InO_(X) powder, GaO_(Y) powder, and ZnO_(Z) powder in apredetermined molar ratio, applying pressure, and performing heattreatment at a temperature higher than or equal to 1000° C. and lowerthan or equal to 1500° C. Note that X, Y, and Z are each a givenpositive number. Here, the predetermined molar ratio of InO_(x) powderto GaO powder and ZnO_(Z) powder is, for example, 2:2:1, 8:4:3, 3:1:1,1:1:1, 4:2:3, or 3:1:2. The kinds of powder and the molar ratio formixing powder may be determined as appropriate depending on the desiredsputtering target.

Next, as illustrated in FIG. 2B, the oxide semiconductor film 19 that issubjected to element isolation is formed to be over the gate insulatingfilm 17 and overlap with part of the gate electrode 15. The oxidesemiconductor film 19 that is subjected to element isolation can beformed by forming a mask over the oxide semiconductor film 18 through aphotolithography step and etching part of the oxide semiconductor film18 with use of the mask.

By using a printing method for forming the oxide semiconductor film 19,the oxide semiconductor film 19 that is subjected to element isolationcan be formed directly.

In this case, the oxide semiconductor film 18 is formed to a thicknessof 35 nm by a sputtering method, a mask is formed over the oxidesemiconductor film 18, and part of the oxide semiconductor film 18 isetched, so that the oxide semiconductor film 19 is formed. After that,the mask is removed.

Next, as illustrated in FIG. 2C, the pair of electrodes 21 is formed.

A method for forming the pair of electrodes 21 is described below.First, a conductive film is formed by a sputtering method, a CVD method,an evaporation method, or the like. Then, a mask is formed over theconductive film by a photolithography step. Next, the conductive film isetched with use of the mask to form the pair of electrodes 21. Afterthat, the mask is removed.

Here, a 50-nm-thick tungsten film, a 400-nm-thick aluminum film, and a100-nm-thick titanium film are deposited by a sputtering method in thisorder to form a stack. Next, a mask is formed over the titanium film bya photolithography step and the tungsten film, the aluminum film, andthe titanium film are dry-etched with use of the mask to form the pairof electrodes 21.

After the pair of electrodes 21 is formed, cleaning treatment ispreferably performed to remove an etching residue. A short circuit ofthe pair of electrodes 21 can be suppressed by this cleaning treatment.The cleaning treatment can be performed using an alkaline solution suchas a tetramethylammonium hydroxide (TMAH) solution, an acidic solutionsuch as a diluted hydrofluoric acid solution, an oxalic acid solution,or a phosphorus acid solution, or water.

Next, as illustrated in FIG. 2D, the protective film 23 is formed.

After the pair of electrodes 21 is formed, as the protective film 23, asilicon oxide film or a silicon oxynitride film is formed over thesubstrate 11 under the following conditions: the substrate 11 placed ina treatment chamber evacuated to a vacuum level in a plasma CVDapparatus is held at a temperature higher than or equal to 180° C. andlower than or equal to 260° C., preferably higher than or equal to 180°C. and lower than or equal to 250° C., further preferably higher than orequal to 180° C. and lower than or equal to 230° C.; a source gas isintroduced into the treatment chamber to set the pressure in thetreatment chamber to be higher than or equal to 100 Pa and lower than orequal to 250 Pa, preferably higher than or equal to 100 Pa and lowerthan or equal to 200 Pa; and the high-frequency power supplied to anelectrode provided in the treatment chamber is greater than or equal to0.17 W/cm² and less than or equal to 0.5 W/cm², preferably greater thanor equal to 0.25 W/cm² and less than or equal to 0.40 W/cm², furtherpreferably greater than or equal to 0.26 W/cm² and less than or equal to0.35 W/cm².

As a source gas of the protective film 23, a deposition gas containingsilicon and an oxidation gas is preferably used. Typical examples of thedeposition gas containing silicon include silane, disilane, trisilane,and silane fluoride. Examples of the oxidation gas include oxygen,ozone, dinitrogen monoxide, and nitrogen dioxide.

As the deposition condition of the protective film 23, thehigh-frequency power with the above power density is supplied in thetreatment chamber under the above pressure, whereby the decompositionefficiency of the source gas in plasma is promoted, oxygen radicals areincreased, and oxidation of the deposition gas containing silicon ispromoted; thus, the amount of oxygen contained in the protective film 23exceeds the stoichiometric composition. However, in the case where thesubstrate temperature is within the above temperature range, the bondbetween silicon and oxygen is weak, and accordingly, part of oxygen isreleased by heating. As a result, an oxide insulating film containingoxygen in excess of the stoichiometric composition can be formed. Inother words, an oxide insulating film from which part of containedoxygen is released by heating can be formed.

In the source gas of the protective film 23, the ratio of the depositiongas containing silicon to the oxidation gas is increased, and thehigh-frequency power is set to have the above power density. Thus, thedeposition rate can be increased, and the amount of oxygen contained inthe protective film can be increased.

Here, a 400-nm-thick silicon oxynitride film is formed as the protectivefilm 23 by a plasma CVD method under the following conditions: silanewith a flow rate of 160 sccm and dinitrogen monoxide with a flow rate of4000 sccm are used as a source gas; the pressure in the treatmentchamber is 200 Pa; the substrate temperature is 220° C.; and ahigh-frequency power of 1500 W is supplied to parallel plate electrodeswith a high-frequency power supply of 27.12 MHz. Note that a plasma CVDapparatus used here is a parallel plate plasma CVD apparatus in whichthe electrode area is 6000 cm², and the power per unit area (powerdensity) into which the supplied power is converted is 0.25 W/cm².

Next, heat treatment is performed, whereby oxygen contained in theprotective film 23 is diffused to the oxide semiconductor film 19 tofill oxygen vacancies in the oxide semiconductor film 19. Thus, theamount of oxygen vacancies contained in the oxide semiconductor film 19can be reduced. In addition, by the heat treatment performed afterformation of the protective film 23, the spin density of a signal atg=2.001 in the protective film 23, which is measured by electron spinresonance, is lower than 1.5×10¹⁸ spins/cm³, preferably lower than orequal to 1.0×10¹⁸ spins/cm³. The heat treatment is performed typicallyat a temperature higher than or equal to 150° C. and lower than thestrain point of the substrate, preferably higher than or equal to 250°C. and lower than or equal to 450° C., further preferably higher than orequal to 300° C. and lower than or equal to 450° C.

Note that when the temperature in the heat treatment is higher than thetemperature in depositing the protective film 23, more oxygen containedin the protective film 23 can be diffused to the oxide semiconductorfilm 19, and thus, oxygen vacancies in the oxide semiconductor film 19can be filled more. The temperature at the heat treatment is higher thanor equal to 250° C. and lower than the strain point of the substrate,preferably higher than or equal to 250° C. and lower than or equal to450° C., further preferably higher than or equal to 300° C. and lowerthan or equal to 450° C.

An electric furnace, a rapid thermal annealing (RTA) apparatus, or thelike can be used for the heat treatment. With the use of an RTAapparatus, the heat treatment can be performed at a temperature higherthan or equal to the strain point of the substrate if the heating timeis short. Thus, time for oxygen diffusion from the protective film 23 tothe oxide semiconductor film 19 can be shortened.

The heat treatment may be performed in an atmosphere of nitrogen,oxygen, ultra-dry air (air in which the water content is 20 ppm or less,preferably 1 ppm or less, further preferably 10 ppb or less), or a raregas (argon, helium, or the like).

Here, the heat treatment is performed at 350° C. in an atmosphere ofnitrogen and oxygen for 1 hour, so that oxygen contained in theprotective film 23 is diffused to the oxide semiconductor film 19. Inthis embodiment, diffusion of oxygen from the protective film 23 to theoxide semiconductor film 19 is solid-phase diffusion; thus, oxygen canbe supplied to the oxide semiconductor film 19 with less damage.

Through the above steps, a transistor with excellent electriccharacteristics in which a shift in the threshold voltage in thenegative direction is suppressed can be manufactured. In addition, ahighly reliable transistor in which a variation in electriccharacteristics with time or a variation in electric characteristics dueto a gate BT stress test under light is small can be manufactured.

Next, a transistor having a structure different from that in FIGS. 1A to1C will be described with reference to FIG. 3 and FIGS. 4A to 4E. In thetransistor described here, films provided in contact with the oxidesemiconductor film are dense films and have high film density ascompared with those in the transistor 10. A structure of such atransistor is described with reference to FIG. 3 .

A transistor 30 illustrated in FIG. 3 includes the base insulating film13 over the substrate 11 and the gate electrode 15 over the baseinsulating film 13. In addition, a gate insulating film 33 including aninsulating film 31 and an insulating film 32 is provided over the baseinsulating film 13 and the gate electrode 15. An oxide semiconductorfilm 20 is provided to overlap with the gate electrode 15 with the gateinsulating film 33 interposed therebetween, and the pair of electrodes21 is provided to be in contact with the oxide semiconductor film 20.Further, a protective film 37 including an insulating film 34 and aninsulating film 36 is formed over the gate insulating film 33, the oxidesemiconductor film 20, and the pair of electrodes 21.

In the transistor 30 shown in this embodiment, the oxide semiconductorfilm 20 is exposed to plasma generated in an oxidation atmosphere. Asthe oxidation atmosphere, an atmosphere of oxygen, ozone, dinitrogenmonoxide, or the like can be given. As a preferable method of plasmatreatment, a parallel plate plasma CVD apparatus is used, plasma isgenerated under a condition where bias is applied to an upper electrodebut is not applied to a lower electrode on which the substrate 11 isplaced, and the oxide semiconductor film is exposed to the plasma. As aresult, oxygen can be supplied to the oxide semiconductor film 20 withless damage, and the amount of oxygen vacancies in the oxidesemiconductor film 20 can be reduced.

In the transistor 30, the insulating film 32 and the insulating film 34are formed in contact with the oxide semiconductor film 20. Theinsulating film 32 and the insulating film 34 are each a dense film andhave high film density. Thus, in a later step of forming the insulatingfilm 36, damage on the oxide semiconductor film 20 can be reduced.

As each of the insulating film 32 and the insulating film 34, a siliconoxide film, a silicon oxynitride film, or the like can be formed to athickness greater than or equal to 5 nm and less than or equal to 400nm, preferably greater than or equal to 5 nm and less than or equal to50 nm, further preferably greater than or equal to 10 nm and less thanor equal to 30 nm.

Further, the insulating film 36 included in the protective film 37provided over the transistor 30 is an oxide insulating film containingoxygen in excess of the stoichiometric composition. It is preferablethat the insulating film 36 contain a larger amount of oxygen than theamount of oxygen vacancies in the oxide semiconductor film 20. The oxideinsulating film containing oxygen in excess of the stoichiometriccomposition is an oxide insulating film from which part of oxygen isreleased by heating. Thus, when the oxide insulating film from whichpart of oxygen is released by heating is provided as the protective film37, oxygen can be diffused to the oxide semiconductor film 20 by heattreatment. By the heat treatment, oxygen contained in the insulatingfilm 36 is diffused to the oxide semiconductor film 20, and thus, oxygenvacancies in the oxide semiconductor film 20 can be filled. As a result,the amount of oxygen vacancies in the oxide semiconductor film 20 isreduced, and accordingly, in the transistor, a shift in the thresholdvoltage in the negative direction can be suppressed. In addition, thetransistor can have excellent electric characteristics in which a shiftin the threshold voltage with time or a shift in the threshold voltagedue to a gate BT stress test under light is small.

Note that in the transistor 30, oxygen contained in the insulating film36 transfers to the oxide semiconductor film 20 through at least one ofthe insulating film 31, the insulating film 32, and the insulating film34.

Next, a method for manufacturing the transistor in FIG. 3 will bedescribed with reference to FIGS. 4A to 4E.

As illustrated in FIG. 4A, the base insulating film 13 and the gateelectrode 15 are formed over the substrate 11, which is similar toEmbodiment 1. Next, the insulating films 31 and 32 functioning as thegate insulating film 33 are formed.

As the insulating film 31, a silicon nitride film or a silicon nitrideoxide film is formed by a CVD method to a thickness greater than orequal to 5 nm and less than or equal to 400 nm. Next, as the insulatingfilm 32, a silicon oxide film or a silicon oxynitride film is formed bya CVD method to a thickness greater than or equal to 5 nm and less thanor equal to 400 nm. Note that the thicknesses of the insulating film 31and the insulating film 32 may be determined so that the sum of thethicknesses of the two insulating films is within the range of thethickness of the gate insulating film 17 in the transistor 10 in FIGS.1A to 1C.

Here, a 50-nm-thick silicon nitride film is formed as the insulatingfilm 31 by a plasma CVD method under the following conditions: silanewith a flow rate of 50 sccm and dinitrogen monoxide with a flow rate of5000 sccm are used as a source gas; the pressure in the treatmentchamber is 60 Pa; the substrate temperature is 350° C.; and ahigh-frequency power of 1500 W is supplied to parallel plate electrodeswith a high-frequency power supply of 27.12 MHz.

As the insulating film 32, a 200-nm-thick silicon oxynitride film isformed by a plasma CVD method under the following conditions: silanewith a flow rate of 20 sccm and dinitrogen monoxide with a flow rate of3000 sccm are used as a source gas; the pressure in the treatmentchamber is 40 Pa; the substrate temperature is 350° C.; and ahigh-frequency power of 100 W is supplied to parallel plate electrodeswith a high-frequency power supply of 27.12 MHz. With the aboveconditions, a dense silicon oxynitride film with higher film densitythan the insulating film 31 can be formed.

The gate insulating film 33 is formed to have a large thickness andpreferably has a stacked structure of a silicon nitride film withresistivity higher than or equal to 5×10³ Ω·cm and lower than or equalto 1×10⁵ Ω·cm and a silicon oxynitride film, whereby in a transistorformed later, electrostatic breakdown caused between the gate electrode15 and the oxide semiconductor film 20 or between the gate electrode 15and the pair of electrodes 21 can be suppressed.

Next, as illustrated in FIG. 4B, the oxide semiconductor film 19 isformed over the gate insulating film 33, which is similar to Embodiment1.

Next, as illustrated in FIG. 4C, the pair of electrode 21 is formed.Then, the oxide semiconductor film 19 is exposed to plasma generated inan oxidation atmosphere, and oxygen 22 is supplied to the oxidesemiconductor film 19, so that the oxide semiconductor film 20 shown inFIG. 4D is formed. As the oxidation atmosphere, an atmosphere of oxygen,ozone, dinitrogen monoxide, or the like can be given. As a preferablemethod of plasma treatment, plasma is generated under a condition wherebias is not applied to a lower electrode on which the substrate 11 isplaced, and the oxide semiconductor film 19 is exposed to the plasma. Asa result, oxygen can be supplied to the oxide semiconductor film 19without damage.

Here, the oxide semiconductor film 19 is exposed to oxygen plasmagenerated in the following manner: dinitrogen monoxide is introducedinto the treatment chamber of the plasma CVD apparatus; and ahigh-frequency power of 150 W is supplied to an upper electrode providedin the treatment chamber with a high-frequency power supply of 27.12MHz.

Next, the insulating film 34 is formed over the oxide semiconductor film20 and the pair of electrodes 21. Here, a 10-nm-thick silicon oxynitridefilm is formed by a plasma CVD method under the following conditions:silane with a flow rate of 20 sccm and dinitrogen monoxide with a flowrate of 3000 sccm are used as a source gas; the pressure in thetreatment chamber is 200 Pa; the substrate temperature is 350° C.; and ahigh-frequency power of 100 W is supplied to parallel plate electrodeswith a high-frequency power supply of 27.12 MHz. By the conditions, adense silicon oxynitride film with higher film density than theinsulating film 36 formed in a later step can be formed.

Next, oxygen 35 may be added to the insulating film 34. As a method foradding the oxygen 35 to the insulating film 34, an ion implantationmethod, an ion doping method, plasma treatment, or the like can begiven. As a result, the insulating film 34 can be an oxide insulatingfilm containing oxygen in excess of the stoichiometric composition.

Next, the insulating film 36 is formed over the insulating film 34 asillustrated in FIG. 4E. As the insulating film 34, a silicon oxide filmor a silicon oxynitride film is formed in a manner similar to that ofthe protective film 23 formed over the transistor 10. The formationconditions are as follows: the substrate 11 is placed in a treatmentchamber evacuated to a vacuum level in a plasma CVD apparatus; thesubstrate is held at a temperature higher than or equal to 180° C. andlower than or equal to 260° C., preferably higher than or equal to 180°C. and lower than or equal to 250° C., further preferably higher than orequal to 180° C. and lower than or equal to 230° C.; a source gas isintroduced into the treatment chamber to set a pressure in the treatmentchamber to be higher than or equal to 100 Pa and lower than or equal to250 Pa, preferably higher than or equal to 100 Pa and lower than orequal to 200 Pa; and a high-frequency power greater than or equal to0.17 W/cm² and less than or equal to 0.5 W/cm², preferably greater thanor equal to 0.25 W/cm² and less than or equal to 0.40 W/cm², furtherpreferably greater than or equal to 0.26 W/cm² and less than or equal to0.35 W/cm² is supplied to an electrode provided in the treatmentchamber.

Then, as in the case of the transistor 10, heat treatment is performed,whereby oxygen contained in the insulating film 36 can be diffused tothe oxide semiconductor film 20 to fill oxygen vacancies in the oxidesemiconductor film 20. Thus, the amount of oxygen vacancies contained inthe oxide semiconductor film 20 can be reduced.

Through the above steps, a transistor with excellent electriccharacteristics in which a shift in the threshold voltage in thenegative direction can be suppressed can be manufactured. In addition, ahighly reliable transistor in which a variation in electriccharacteristics with time or a variation in electric characteristics dueto a gate BT stress test under light is small can be manufactured.

Note that the structures, methods, and the like described in thisembodiment can be used as appropriate in combination with any of thestructures, methods, and the like described in the other embodiments andexamples.

Embodiment 2

In this embodiment, a transistor having a different structure from thetransistor in Embodiment 1 will be described with reference to FIGS. 5Ato 5C. A transistor 100 shown in this embodiment is a top-gatetransistor, which is different from the transistor shown in Embodiment1.

FIG. 5A to 5C are a top view and cross-sectional views of the transistor100. FIG. 5A is a top view of the transistor 100, FIG. 5B is across-sectional view taken along dashed-dotted line A-B in FIG. 5A, andFIG. 5C is a cross-sectional view taken along dashed-dotted line C-D inFIG. 5A. Note that in FIG. 5A, some components of the transistor 100(e.g., a substrate 101, a base insulating film 103, and a gateinsulating film 109), a protective film 113, and the like are notillustrated for simplicity.

The transistor 100 illustrated in FIGS. 5B and 5C includes an oxidesemiconductor film 105 over the base insulating film 103, a pair ofelectrodes 107 in contact with the oxide semiconductor film 105, thegate insulating film 109 in contact with the base insulating film 103,the oxide semiconductor film 105, and the pair of electrodes 107, and agate electrode 111 overlapping with the oxide semiconductor film 105with the gate insulating film 109 interposed therebetween. In addition,the protective film 113 covering the gate insulating film 109 and thegate electrode 111 and a wiring 115 in contact with the pair ofelectrodes 107 in openings 110 formed in the gate insulating film 109and the protective film 113 (see FIG. 5A) may be provided.

The protective film 113 provided over the transistor 100 shown in thisembodiment is an oxide insulating film containing oxygen in excess ofthe stoichiometric composition. It is preferable that the protectivefilm 113 contain a larger amount of oxygen than the amount of oxygenvacancies in the oxide semiconductor film 105. The oxide insulating filmcontaining oxygen in excess of the stoichiometric composition is anoxide insulating film from which part of oxygen is released by heating.Thus, when the oxide insulating film from which part of oxygen isreleased by heating is provided as the protective film 113, oxygen canbe diffused to the oxide semiconductor film 105 by heat treatment. Withthe oxygen, oxygen vacancies in the oxide semiconductor film 105 can befilled. As a result, the amount of oxygen vacancies in the oxidesemiconductor film 105 is reduced, and accordingly, a transistor inwhich a shift in the threshold voltage in the negative direction issuppressed can be provided. In addition, a shift in the thresholdvoltage with time or a shift in the threshold voltage due to a gate BTstress test under light is small; thus, a transistor with excellentelectric characteristics can be manufactured.

Note that in the transistor 100, oxygen contained in the protective film113 transfers to the oxide semiconductor film 105 through at least oneof the base insulating film 103 and the gate insulating film 109.

Further, in the protective film 113, the spin density of a signal atg=2.001, which is measured by electron spin resonance, is preferablylower than 1.5×10¹⁸ spins/cm³, further preferably lower than or equal to1.0×10¹⁸ spins/cm³. In that case, a transistor has excellent electriccharacteristics.

As the protective film 113, a silicon oxide film, a silicon oxynitridefilm, or the like can be formed to have a thickness greater than orequal to 30 nm and less than or equal to 500 nm, preferably greater thanor equal to 100 nm and less than or equal to 400 nm.

Other details of the transistor 100 are described.

As the substrate 101, a substrate which is given as an example of thesubstrate 11 in Embodiment 1 can be used as appropriate.

The base insulating film 103 is preferably formed using an oxideinsulating film from which part of oxygen is released by heating. Assuch an oxide insulating film from which part of oxygen is released byheating, an oxide insulating film containing oxygen in excess of thestoichiometric composition is preferably used. The oxide insulating filmfrom which part of oxygen is released by heating can make oxygen diffuseinto the oxide semiconductor film by heat treatment. Typical examples ofthe base insulating film 103 are films of silicon oxide, siliconoxynitride, silicon nitride oxide, gallium oxide, hafnium oxide, yttriumoxide, aluminum oxide, aluminum oxynitride, and the like.

The thickness of the base insulating film 103 is greater than or equalto 50 nm, preferably greater than or equal to 200 nm and less than orequal to 3000 nm, further preferably greater than or equal to 300 nm andless than or equal to 1000 nm. With use of the thick base insulatingfilm 103, the amount of oxygen released from the base insulating film103 can be increased, and the interface state density at the interfacebetween the base insulating film 103 and an oxide semiconductor filmformed later can be reduced.

Here, “to release part of oxygen by heating” means that the amount ofreleased oxygen converted into oxygen atoms is greater than or equal to1.0×10¹⁸ atoms/cm³, preferably greater than or equal to 3.0×10²⁰atoms/cm³ in thermal desorption spectroscopy (TDS) analysis.

In the above structure, the insulating film from which part of oxygen isreleased by heating may be oxygen-excess silicon oxide (SiO_(X) (X>2)).In the oxygen-excess silicon oxide (SiO_(X) (X>2)), the number of oxygenatoms per unit volume is more than twice the number of silicon atoms perunit volume. The number of silicon atoms and the number of oxygen atomsper unit volume are measured by Rutherford backscattering spectrometry.

Here, in TDS analysis, the measurement method of the amount of desorbedoxygen at the oxygen atomic conversion is described below.

The desorption amount of gas in the TDS analysis is proportional to anintegral value of spectrum. Therefore, the amount of a desorbed gas canbe calculated from the ratio between the integral value of a spectrum ofan insulating film and the reference value of a standard sample. Thereference value of a standard sample refers to the ratio of the densityof a predetermined atom contained in a sample to the integral value of aspectrum.

For example, the number of the released oxygen molecules (NO₂) from aninsulating film can be calculated according to Formula 1 using the TDSanalysis results of a silicon wafer containing hydrogen at apredetermined density, which is the standard sample, and the TDSanalysis results of the insulating film. Here, all spectra having a massnumber of 32 which are obtained by the TDS analysis are assumed tooriginate from an oxygen molecule. CH₃OH, which is given as a gas havinga mass number of 32, is not taken into consideration on the assumptionthat it is unlikely to be present. Further, an oxygen molecule includingan oxygen atom having a mass number of 17 or 18 which is an isotope ofan oxygen atom is not taken into consideration either because theproportion of such a molecule in the natural world is minimal.

N _(O2) =N _(H2) /S _(H2) ×S _(O2)×α  (Formula 1)

N_(H2) is the value obtained by conversion of the number of hydrogenmolecules desorbed from the standard sample into densities. S_(H2) isthe integral value of a spectrum when the standard sample is subjectedto TDS analysis. Here, the reference value of the standard sample is setto N_(H2)/S_(H2). S_(O2) is the integral value of a spectrum when theinsulating film is subjected to TDS analysis. α is a coefficientaffecting the intensity of the spectrum in the TDS analysis. Refer toJapanese Published Patent Application No. H6-275697 for details ofFormula 1. Note that the amount of released oxygen from the aboveinsulating film is measured with a thermal desorption spectroscopyapparatus produced by ESCO Ltd., EMD-WA1000S/W using a silicon wafercontaining hydrogen atoms at 1×10¹⁶ atoms/cm² as the standard sample.

Further, in the TDS analysis, oxygen is partly detected as an oxygenatom. The ratio between oxygen molecules and oxygen atoms can becalculated from the ionization rate of the oxygen molecules. Note that,since the above α includes the ionization rate of oxygen molecules, thenumber of the released oxygen atoms can also be estimated through themeasurement of the number of the released oxygen molecules.

Note that N_(O2) is the number of released oxygen molecules. For theinsulating film, the amount of released oxygen when converted intooxygen atoms is twice the number of the released oxygen molecules.

By supplying oxygen from the base insulating film 103 to the oxidesemiconductor film 105, an interface state density between the baseinsulating film 103 and the oxide semiconductor film 105 can be reduced.As a result, electric charge or the like which may be generated due toan operation of the transistor or the like can be prevented from beingtrapped at the interface between the base insulating film 103 and theoxide semiconductor film 105, and thereby a transistor with lessvariation in electric characteristics can be provided.

In other words, when oxygen vacancies are generated in the oxidesemiconductor film 105, electric charge is trapped at the interfacebetween the base insulating film 103 and the oxide semiconductor film105, whereby the electric charge affects the electric characteristics ofthe transistor. However, by providing an insulating film from whichoxygen is released by heating as the base insulating film 103, theinterface state density between the oxide semiconductor film 105 and thebase insulating film 103 can be reduced, and an influence of the trap ofelectric charge at the interface between the oxide semiconductor film105 and the base insulating film 103 can be made small.

The oxide semiconductor film 105 can be formed in a manner similar tothat of the oxide semiconductor film 19 in Embodiment 1.

The pair of electrodes 107 can be formed in a manner similar to that ofthe pair of electrodes 21 shown in Embodiment 1. Note that the length ofthe pair of electrodes 107 in the channel width direction is larger thanthat of the oxide semiconductor film 105, and seen in the cross sectionin the channel length direction, the pair of electrodes 107 covers endportions of the oxide semiconductor film 105. With such a structure, anarea of contact between the pair of electrodes 107 and the oxidesemiconductor film 105 is increased. Thus, the contact resistancebetween the oxide semiconductor film 105 and the pair of electrodes 107can be reduced, and the on-state current of the transistor can beincreased.

Note that although the pair of electrodes 107 is provided between theoxide semiconductor film 105 and the gate insulating film 109 in thisembodiment, the pair of electrodes 107 may be provided between the baseinsulating film 103 and the oxide semiconductor film 105.

The gate insulating film 109 can be formed in a manner similar to thatof the gate insulating film 17 in Embodiment 1.

The gate electrode 111 can be formed in a manner similar to that of thegate electrode 15 in Embodiment 1.

The wiring 115 can be formed using a material which can be used for thepair of electrodes 107 as appropriate.

Next, a method for manufacturing the transistor illustrated in FIGS. 5Ato 5C will be described with reference to FIGS. 6A to 6D.

As illustrated in FIG. 6A, the base insulating film 103 is formed overthe substrate 101. Next, the oxide semiconductor film 105 is formed overthe base insulating film 103.

The base insulating film 103 is formed by a sputtering method, a CVDmethod or the like.

When the oxide insulating film from which part of oxygen is released byheating is formed by a sputtering method as the base insulating film103, the amount of oxygen in a deposition gas is preferably large, andoxygen, a mixed gas of oxygen and a rare gas, or the like can be used.Typically, the oxygen concentration of a deposition gas is preferablyfrom 6% to 100%.

In the case where an oxide insulating film is formed by a CVD method asthe base insulating film 103, hydrogen or water derived from a sourcegas is sometimes mixed in the oxide insulating film. Thus, after theoxide insulating film is formed by a CVD method, heat treatment ispreferably performed as dehydrogenation or dehydration.

In the case of adding oxygen to the oxide insulating film formed by aCVD method, the amount of oxygen released by heating can be increased.As the method for adding oxygen to the oxide insulating film, an ionimplantation method, an ion doping method, a plasma immersion ionimplantation method, plasma treatment, or the like can be used.

The oxide semiconductor film 105 can be formed as appropriate by aformation method similar to that of the oxide semiconductor film 19described in Embodiment 1.

In order to improve the orientation of the crystal parts in the CAAC-OSfilm, planarity of the surface of the base insulating film 103 servingas a base insulating film of the oxide semiconductor film is preferablyimproved. Typically, the average surface roughness (Ra) of the baseinsulating film 103 is preferably 1 nm or less, further preferably 0.3nm or less, still preferably 0.1 nm or less. In this specification andthe like, average surface roughness (Ra) is obtained bythree-dimensional expansion of arithmetic mean surface roughness that isdefined by JIS B 0601:2001 (ISO4287:1997) so as to be applied to acurved surface, and is an average value of the absolute values ofdeviations from a reference surface to a specific surface. Asplanarization treatment, one or more can be selected from chemicalmechanical polishing (CMP) treatment, dry etching treatment, plasmatreatment (reverse sputtering), and the like. The plasma treatment isthe one in which minute unevenness of the surface is reduced byintroducing an inert gas such as an argon gas into a vacuum chamber andapplying an electric field so that a surface to be processed serves as acathode.

Next, heat treatment is preferably performed. By this heat treatment,part of oxygen contained in the base insulating film 103 can be diffusedto the vicinity of the interface between the base insulating film 103and the oxide semiconductor film 105. As a result, the interface statedensity in the vicinity of the interface between the base insulatingfilm 103 and the oxide semiconductor film 105 can be reduced.

The temperature of the heat treatment is typically higher than or equalto 150° C. and lower than the strain point of the substrate, preferablyhigher than or equal to 250° C. and lower than or equal to 450° C.,further preferably higher than or equal to 300° C. and lower than orequal to 450° C.

The heat treatment is performed under an inert gas atmosphere containingnitrogen or a rare gas such as helium, neon, argon, xenon, or krypton.Alternatively, the heat treatment may be performed in an inert gasatmosphere first, and then in an oxygen atmosphere. It is preferablethat the above inert gas atmosphere and the above oxygen atmosphere donot contain hydrogen, water, and the like. The treatment time is 3minutes to 24 hours.

Note that the oxide semiconductor film 105 may be formed in thefollowing manner: an oxide semiconductor film that is to be the oxidesemiconductor film 105 in a later step is formed over the baseinsulating film 103; heat treatment is performed thereon; and part ofthe oxide semiconductor film is etched. By the above steps, oxygencontained in the base insulating film 103 can be diffused more in thevicinity of the interface between the base insulating film 103 and theoxide semiconductor film 105.

Next, as illustrated in FIG. 6B, the pair of electrodes 107 is formed.The pair of electrodes 107 can be formed as appropriate by a formationmethod similar to those of the pair of electrodes 21 described inEmbodiment 1. Alternatively, the pair of electrodes 107 can be formed bya printing method or an inkjet method.

The gate insulating film 109 is formed, and then, the gate electrode 111is formed over the gate insulating film 109 as illustrated in FIG. 6C.

The gate insulating film 109 can be formed as appropriate d by aformation method similar to those of the gate insulating film 17described in Embodiment 1.

In a CAAC-OS film, oxygen tends to move along the surface where theCAAC-OS film is formed or the surface of the CAAC-OS film. Thus, oxygenrelease occurs from the side surface of the oxide semiconductor film 105that has been subjected to element isolation, and oxygen vacancies tendto be formed in the side surface. However, when as the gate insulatingfilm 109, an oxide insulating film from which part of oxygen is releasedby heating and a metal oxide film (which is to be over the oxideinsulating film) are formed over the oxide semiconductor film 105,oxygen release from the side surface of the oxide semiconductor film 105can be suppressed. As a result, an increase in conductivity of the sidesurface of the oxide semiconductor film 105 can be suppressed.

The gate electrode 111 can be formed as appropriate by a formationmethod similar to those of the gate electrode 15 in Embodiment 1.

Here, an example of a method for forming a gate electrode whose width isreduced to a length shorter than or equal to the resolution limit of alight exposure apparatus is described. A slimming process is preferablyperformed on a mask used for forming the gate electrode 111 to make themask have a further miniaturized structure. As the slimming process, anashing process using an oxygen radical or the like can be employed, forexample. However, the slimming process other than the ashing process maybe used as long as the mask formed by a photolithography method or thelike can be processed to have a further miniaturized structure. Sincethe channel length of a transistor is determined by the mask formed bythe slimming process, a process with high controllability is preferablyemployed. As a result of the slimming process, the width of the maskformed by a photolithography method or the like can be reduced to alength shorter than or equal to the resolution limit of a light exposureapparatus, preferably less than or equal to half of the resolution limitof a light exposure apparatus, and further preferably less than or equalto one third of the resolution limit of the light exposure apparatus.For example, the width of the formed mask can be greater than or equalto 20 nm and less than or equal to 2000 nm, preferably greater than orequal to 50 nm and less than or equal to 350 nm. Further, when aconductive film is etched while the mask subjected to slimming is madeto recede, the gate electrode 111 whose width is reduced to a lengthshorter than or equal to the resolution limit of a light exposureapparatus can be formed.

Next, the protective film 113 is formed over the gate insulating film109 and the gate electrode 111, and then the wiring 115 connected to thepair of electrodes 107 is formed as illustrated in FIG. 6D.

As the protective film 113, a silicon oxide film or a silicon oxynitridefilm is formed in a manner similar to that of the protective film 23 inEmbodiment 1. Specifically, the formation conditions are as follows: thesubstrate 101 is placed in a treatment chamber evacuated to a vacuumlevel in a plasma CVD apparatus; the substrate is held at a temperaturehigher than or equal to 180° C. and lower than or equal to 260° C.,preferably higher than or equal to 180° C. and lower than or equal to250° C., further preferably higher than or equal to 180° C. and lowerthan or equal to 230° C.; a source gas is introduced into the treatmentchamber to set a pressure in the treatment chamber to be higher than orequal to 100 Pa and lower than or equal to 250 Pa, preferably higherthan or equal to 100 Pa and lower than or equal to 200 Pa; and ahigh-frequency power greater than or equal to 0.17 W/cm² and less thanor equal to 0.5 W/cm², preferably greater than or equal to 0.25 W/cm²and less than or equal to 0.40 W/cm², further preferably greater than orequal to 0.26 W/cm² and less than or equal to 0.35 W/cm² is supplied toan electrode provided in the treatment chamber.

As the conditions for forming the protective film 113, thehigh-frequency power with the above power density is supplied under theabove pressure, whereby an oxide insulating film containing oxygen inexcess of the stoichiometric composition can be formed.

Next, heat treatment is performed as in the case of Embodiment 1,whereby oxygen contained in the protective film 113 can be diffused tothe oxide semiconductor film 105 to fill oxygen vacancies in the oxidesemiconductor film 105. Thus, the amount of oxygen vacancies in theoxide semiconductor film 105 can be reduced. In addition, by the heattreatment performed after the protective film 113 is formed, the spindensity of a signal at g=2.001 in the protective film 113, which ismeasured by electron spin resonance, is preferably lower than 1.5×10¹⁸spins/cm³, further preferably lower than or equal to 1.0×10¹⁸ spins/cm³.The heat treatment is performed typically at a temperature higher thanor equal to 150° C. and lower than the strain point of the substrate,preferably higher than or equal to 250° C. and lower than or equal to450° C., further preferably higher than or equal to 300° C. and lowerthan or equal to 450° C.

After a conductive film is formed by a sputtering method, a CVD method,an evaporation method, or the like, a mask is formed over the conductivefilm and the conductive film is etched, so that the wiring 115 isformed. The mask formed over the conductive film can be formed by aprinting method, an inkjet method, or a photolithography method asappropriate. Then, the mask is removed. Alternatively, the wiring 115may be formed by a dual damascene method.

Through the above steps, a transistor with excellent electriccharacteristics in which a shift in the threshold voltage in thenegative direction can be suppressed can be manufactured. In addition, ahighly reliable transistor in which a variation in electriccharacteristics with time or a variation in electric characteristics dueto a gate BT stress test under light is small can be manufactured.

Note that the structures, methods, and the like described in thisembodiment can be used as appropriate in combination with any of thestructures, methods, and the like described in the other embodiments andexamples.

Embodiment 3

In this embodiment, a transistor having a structure different from thoseof Embodiment 1 and Embodiment 2 will be described with reference toFIGS. 7A and 7B. A transistor 120 shown in this embodiment is differentfrom the transistor 100 shown in Embodiment 2 in that dopant is added toan oxide semiconductor film.

FIGS. 7A and 7B are a top view and a cross-sectional view of thetransistor 120. FIG. 7A is a top view of the transistor 120, and FIG. 7Bcorresponds to a cross-sectional view taken along dashed line A-B inFIG. 7A. Note that in FIG. 7A, some components of the transistor 120(e.g., a substrate 101, a base insulating film 103, and a gateinsulating film 109), a protective film 113, and the like are notillustrated for simplicity.

The transistor 120 illustrated in FIG. 7B includes an oxidesemiconductor film 121 over the base insulating film 103, a pair ofelectrodes 107 in contact with the oxide semiconductor film 121, thegate insulating film 109 in contact with the base insulating film 103,the oxide semiconductor film 121, and the pair of electrodes 107, and agate electrode 111 overlapping with the oxide semiconductor film 121with the gate insulating film 109 interposed therebetween. In addition,the protective film 113 covering the gate insulating film 109 and thegate electrode 111 is provided. Furthermore, a wiring 115 may providedto be in contact with the pair of electrodes 107 through openings 110formed in the gate insulating film 109 and the protective film 113 (seeFIG. 7A).

In the transistor 120 in this embodiment, the oxide semiconductor film121 includes a first region 123 overlapping with the gate electrode 111with the gate insulating film 109 interposed therebetween, a pair ofsecond regions 125 to which dopant is added, and a pair of third regions127 in contact with the pair of electrodes 107. Note that dopant is notadded to the first region 123 or the third regions 127. The pair ofsecond regions 125 is provided so that the first region 123 issandwiched therebetween. The pair of third regions 127 is provided sothat the first region 123 and the second regions 125 are sandwichedtherebetween.

The first region 123 functions as a channel region in the transistor120. From a region in the third regions 127, which is in contact withthe pair of electrodes 107, part of contained oxygen is diffused to thepair of electrodes 107, so that oxygen vacancies are caused, andaccordingly such a region becomes an n-type region. Thus, parts of thethird regions 127 function as a source region or a drain region. Thesecond regions have high conductivity because dopant is added thereto,and thus function as a low resistance region which has a function ofreducing resistance between the channel region and the source or drainregion. Therefore, the on-state current and field effect mobility of thetransistor 120 can be increased as compared with the transistor 100 inEmbodiment 1.

As the dopant added to the second region 125, at least one of boron,nitrogen, phosphorus, and arsenic can be given. Alternatively, at leastone of helium, neon, argon, krypton, and xenon can be given. Stillalternatively, dopant may contain at least one of boron, nitrogen,phosphorus, and arsenic and at least one of helium, neon, argon,krypton, and xenon in appropriate combination.

The dopant concentration of the pair of second regions 125 is higherthan or equal to 5×10¹⁸ atoms/cm³ and lower than or equal to 1×10²²atoms/cm³, preferably higher than or equal to 5×10¹⁸ atoms/cm³ and lowerthan 5×10¹⁹ atoms/cm³.

Since the dopant is included, the carrier density or defects in thesecond regions 125 can be increased. Therefore, the conductivity can behigh as compared with the first region 123 and the third regions 127which do not contain dopant. Note that when the dopant concentration istoo high, the dopant inhibits carrier transfer, leading to lowerconductivity of the second regions 125.

The conductivity of the second regions 125 is preferably higher than orequal to 0.1 S/cm and lower than or equal to 1000 S/cm, preferablyhigher than or equal to 10 S/cm and lower than or equal to 1000 S/cm.

Next, a method for manufacturing the transistor 120 shown in thisembodiment is described with reference to FIGS. 6A to 6D and FIGS. 7Aand 7B.

As in the case of Embodiment 1, the base insulating film 103 is formedover the substrate 101, the oxide semiconductor film 121 is formed overthe base insulating film 103, and the pair of electrodes 107 is formedover the oxide semiconductor film 121 through the steps illustrated inFIGS. 6A to 6C. Then, the gate insulating film 109 is formed over theoxide semiconductor film 121 and the pair of electrodes 107. After that,the gate electrode 111 is formed to overlap with part of the oxidesemiconductor film 121 with the gate insulating film 109 interposedtherebetween.

Next, dopant is added to the oxide semiconductor film 121 with use ofthe pair of electrodes 107 and the gate electrode 111 as masks. As amethod of adding a dopant to the oxide semiconductor film 121, an iondoping method or an ion implantation method can be used.

In the embodiment describe here, the addition of the dopant to the oxidesemiconductor film 121 is conducted in a state where the oxidesemiconductor film 121 is covered with the gate insulating film 109 andthe like; alternatively, the addition of the dopant may be conducted ina state where the oxide semiconductor film 121 is exposed.

Further, the addition of the dopant may also be conducted using a methodother than injection methods, such as an ion doping method and an ionimplantation method. For example, the dopant can be added in thefollowing manner: plasma is generated in an atmosphere of gas containingan element to be added and plasma treatment is performed on the oxidesemiconductor film 121. A dry etching apparatus, a plasma CVD apparatus,or the like can be used to generate the plasma.

Note that the dopant may be added while the substrate 101 is beingheated.

Here, phosphorus is added to the oxide semiconductor film 121 by an ionimplantation method.

After that, heat treatment is performed. The heat treatment is performedtypically at a temperature higher than or equal to 150° C. and lowerthan or equal to 450° C., preferably higher than or equal to 250° C. andlower than or equal to 325° C. In the heat treatment, the temperaturemay be gradually increased from 250° C. to 325° C.

By this heat treatment, conductivity of the second region 125 can beincreased. Note that through the heat treatment, the first region 123,the second regions 125, and the third regions 127 become apolycrystalline structure, an amorphous structure, or a CAAC-OS.

Then, as in the case of Embodiment 1, the protective film 113 is formed,and heat treatment is performed, so that oxygen contained in theprotective film 113 is diffused to the oxide semiconductor film 121 andoxygen vacancies in the oxide semiconductor film 121 is reduced. Afterthat, the wiring 115 is formed. Thus, the transistor 120 illustrated inFIGS. 7A and 7B can be completed.

In the transistor 120 in this embodiment, the oxide semiconductor film121 includes the first region 123 functioning as a channel region, andthe second regions 125 which are low resistance regions between thethird regions 127 functioning as a source region and a drain region.Thus, as compared with the transistor 100 described in Embodiment 2,resistance between the channel region and the source or drain region canbe reduced, so that the on-state current can be increased. In addition,when the protective film 113 is provided over the transistor 120, thetransistor can have excellent characteristics in which the shift in thethreshold voltage in the negative direction can be suppressed.Furthermore, a highly reliable transistor in which a variation inelectric characteristics with time or a variation in electriccharacteristics due to a gate BT stress test under light is small can bemanufactured.

Note that in the transistor 120, oxygen contained in the protective film113 transfers to the oxide semiconductor film 121 through at least oneof the base insulating film 103 and the gate insulating film 109.

Note that the structures, methods, and the like described in thisembodiment can be used as appropriate in combination with any of thestructures, methods, and the like described in the other embodiments andexamples.

Embodiment 4

In this embodiment, a transistor having a different structure from thetransistors in Embodiments 1 to 3 will be described with reference toFIGS. 8A and 8B. In a transistor 130 shown in this embodiment, astructure of an oxide semiconductor film is different from those of thetransistors in the other embodiments. In the oxide semiconductor film ofthe transistor 130, an electric-field relaxation region is providedbetween a channel region and a source or drain region.

FIGS. 8A and 8B are a top view and a cross-sectional view of thetransistor 130. FIG. 8A is a top view of the transistor 130, and FIG. 8Bcorresponds to a cross-sectional view taken along dashed-dotted line A-Bin FIG. 8A. Note that in FIG. 8A, some components of the transistor 130(e.g., a substrate 101, a base insulating film 103, and a gateinsulating film 109), a protective film 113, and the like are notillustrated for simplicity.

The transistor 130 illustrated in FIG. 8B includes the base insulatingfilm 103 over the substrate 101, an oxide semiconductor film 131 overthe base insulating film 103, a pair of electrodes 139 in contact withthe oxide semiconductor film 131, the gate insulating film 109 incontact with the base insulating film 103, the oxide semiconductor film131, and the pair of electrodes 139, and a gate electrode 111overlapping with the oxide semiconductor film 131 with the gateinsulating film 109 interposed therebetween. In addition, the protectivefilm 113 is provided to cover the gate insulating film 109 and the gateelectrode 111. Furthermore, a wiring 115 may be provided to be incontact with the pair of electrodes 139 through openings 110 formed inthe gate insulating film 109 and the protective film 113.

In the transistor 130 in this embodiment, the oxide semiconductor film131 includes a first region 133 overlapping with the gate electrode 111with the gate insulating film 109 interposed therebetween, a pair ofsecond regions 135 to which dopant is added, and a pair of third regions137 which is in contact with the pair of electrodes 139 and to whichdopant is added. Note that dopant is not added to the first region 133.The pair of second regions 135 is provided so that the first region 133is sandwiched therebetween. The pair of third regions 137 is provided sothat the first region 133 and the second regions 135 are sandwichedtherebetween.

As the dopant added to the second regions 135 and the third regions 137,dopant similar to that added to the second regions 125 in Embodiment 3can be used as appropriate.

The dopant concentration and the conductivity in the second regions 135and the third regions 137 can be equal to those in the second regions125 in Embodiment 3. Note that in this embodiment, the dopantconcentration and the conductivity of the third regions 137 are higherthan those of the second regions 135.

The first region 133 functions as a channel region in the transistor130. The second regions 135 function as electric-field relaxationregions. From a region in the third regions 137, which is in contactwith the pair of electrodes 139, part of contained oxygen is diffused tothe pair of electrodes 139 depending on a material of the pair ofelectrodes 139, so that oxygen vacancies are caused, and accordinglysuch a region becomes an n-type region. Since the third regions 137include the dopant and have high conductivity, a contact resistancebetween the third regions 137 and the pair of electrodes 139 can bereduced as compared with the transistor 120 in Embodiment 2. Thus, theon-state current and the field effect mobility of the transistor 130 canbe increased as compared with the transistor in Embodiment 2.

In order to add the dopant to the third regions 137, the pair ofelectrodes 139 is preferably formed thin: the thickness is typicallygreater than or equal to 10 nm and less than or equal to 100 nm,preferably, greater than or equal to 20 nm and less than or equal to 50nm.

Next, a method for manufacturing the transistor 130 in this embodimentis described with reference to FIGS. 6A to 6D and FIGS. 8A and 8B.

As in the case of Embodiment 2, through the steps illustrated in FIGS.6A to 6C, the base insulating film 103 is formed over the substrate 101,the oxide semiconductor film 131 is formed over the base insulating film103, and the pair of electrodes 139 is formed over the oxidesemiconductor film 131 (see FIG. 8B). Next, the gate insulating film 109is formed over the oxide semiconductor film 131 and the pair ofelectrodes 139, and the gate electrode 111 is formed to overlap withpart of the oxide semiconductor film 131 with the gate insulating film109 interposed therebetween.

Next, the dopant is added to the oxide semiconductor film 131 with useof the gate electrode 111 as a mask. The dopant can be added by a methodsimilar to that described in Embodiment 2 as appropriate. Note that inthis embodiment, dopant is added to the third regions 137 as well as thesecond regions 135. The dopant concentration in the third regions 137 ishigher than that in the second regions 135. The conditions of the addingmethod are adjusted appropriately so that a peak of the dopantconcentration profile appears in the third regions 137. In this case,the third regions 137 overlap with the pair of electrodes 139, but thesecond regions 135 do not overlap with the pair of electrodes 139.Accordingly, as for the dopant concentration profile of the secondregions 135, a peak is positioned in the base insulating film 103; thus,the dopant concentration in the second regions 135 is lower than that inthe third regions 137.

After that, heat treatment is performed. The heat treatment is performedtypically at a temperature higher than or equal to 150° C. and lowerthan or equal to 450° C., preferably higher than or equal to 250° C. andlower than or equal to 325° C. In the heat treatment, the temperaturemay be gradually increased from 250° C. to 325° C.

By the heat treatment, the conductivity of the second regions 135 andthe third regions 137 can be increased. Note that through the heattreatment, the first region 133, the second regions 135, and the thirdregions 137 become a polycrystalline structure, an amorphous structure,or a CAAC-OS.

After that, as in the case of Embodiment 2, the protective film 113 isformed, and heat treatment is performed so as to diffuse oxygencontained in the protective film 113 to the oxide semiconductor film131, whereby oxygen vacancies are reduced. Then, the wiring 115 isformed, so that the transistor 130 illustrated in FIGS. 8A and 8B can becompleted.

In the transistor 130 in this embodiment, the oxide semiconductor film131 includes the first region 133 functioning as a channel region, andthe second regions 135 functioning as an electric-field relaxationregion between the third regions 137 functioning as a source region anda drain region. Thus, deterioration of the transistor can be suppressedas compared with the transistor 100 in Embodiment 2. In addition, thethird regions 137 in contact with the pair of electrodes 139 include thedopant, which enables the contact resistance between the pair ofelectrodes 139 and the third regions 137 to be further reduced.Accordingly, the on-state current of the transistor can be increased.Further, when the protective film 113 is provided over the transistor130, excellent electric characteristics of the transistor, in which ashift in the threshold voltage in the negative direction can besuppressed, can be obtained. Moreover, a highly reliable transistor inwhich a variation in electric characteristics with time or a variationin electric characteristics due to a gate BT stress test under light issmall can be provided.

Note that in the transistor 130, oxygen contained in the protective film113 transfers to the oxide semiconductor film 131 through at least oneof the base insulating film 103 and the gate insulating film 109.

Note that the structures, methods, and the like described in thisembodiment can be used as appropriate in combination with any of thestructures, methods, and the like described in the other embodiments andexamples.

Embodiment 5

In this embodiment, structures of transistors applicable to Embodiments2 to 4 will be described with reference to FIGS. 9A to 9C.

The transistors shown in this embodiment includes sidewall insulatingfilms in contact with side surfaces of the gate electrode 111. Here,description will be made using the transistor described in Embodiment 2.

A transistor 140 illustrated in FIG. 9A includes an oxide semiconductorfilm 105 over the base insulating film 103, a pair of electrodes 107 incontact with the oxide semiconductor film 105, the gate insulating film109 in contact with the base insulating film 103, the oxidesemiconductor film 105, and the pair of electrodes 107, and a gateelectrode 111 overlapping with the oxide semiconductor film 105 with thegate insulating film 109 interposed therebetween. Further, thetransistor includes sidewall insulating films 141 in contact with theside surfaces of the gate electrode 111. In addition, a protective film113 is provided to cover the gate insulating film 109, the gateelectrode 111, and the sidewall insulating films 141. Furthermore, awiring 115 may be provided to be in contact with the pair of electrodes107 through openings formed in the gate insulating film 109 and theprotective film 113.

End portions of the sidewall insulating films 141 overlap with the pairof electrodes 107. The sidewall insulating films 141 are provided tofill a space between the pair of electrodes 107 and the gate electrode111, which makes it possible to reduce unevenness generated between thepair of electrodes 107 and the gate electrode 111. Thus, coverage withthe protective film 113 can be improved.

A difference between a transistor 150 illustrated in FIG. 9B and thetransistor 140 is a shape of sidewall insulating films 151 in contactwith the side surfaces of the gate electrode 111. Specifically, endportions of the sidewall insulating films 151 do not overlap with thepair of electrodes 107, and the sidewall insulating films 151 arepositioned between the gate electrode 111 and the pair of electrodes107.

A difference between a transistor 160 illustrated in FIG. 9C and thetransistor 150 in FIG. 9B is that dopant is added to an oxidesemiconductor film 161.

The oxide semiconductor film 161 includes a first region 163 overlappingwith the gate electrode 111 with the gate insulating film 109 interposedtherebetween, a pair of second regions 165 to which dopant is added andwhich overlap with the sidewall insulating films 151, a pair of thirdregions 167 to which dopant is added, and a pair of fourth regions 169in contact with the pair of electrodes 107. Note that dopant is notadded to the first region 163 and the fourth regions 169. The pair ofsecond regions 165 is provided so that the first region 163 issandwiched therebetween. The pair of third regions 167 is provided sothat the first region 163 and the second regions 165 are sandwichedtherebetween. The pair of fourth regions 169 is provided so that thefirst region 163 to the third regions 167 are sandwiched therebetween.

The first region 163 functions as a channel region in the transistor160.

Since the second regions 165 and the third regions 167 include thedopant and thus have high conductivity, they function as low resistanceregions and enable the resistance between the channel region and asource or drain region to be reduced. Further, the second regions 165functions as electric-field relaxation regions because the secondregions 165 have a lower dopant concentration and lower conductivitythan the third regions 167. Thus, deterioration of the transistor 160can be suppressed.

As the dopant added to the second regions 165 and the third regions 167,dopant similar to that added to the second regions 125 in Embodiment 3can be used as appropriate.

The dopant concentration and the conductivity in the second regions 165and the third regions 167 can be equal to those of the second regions125 in Embodiment 3. Note that in this embodiment, the dopantconcentration and the conductivity of the third regions 167 are higherthan those of the second regions 165.

From a region in the fourth regions 169, which is in contact with thepair of electrodes 107, part of contained oxygen is diffused to the pairof electrodes 107, so that oxygen vacancies are caused, and accordinglysuch a region becomes an n-type region. As a result, parts of the fourthregions 169 function as a source region and a drain region.

In the oxide semiconductor film 161 of the transistor 160 in thisembodiment, the first region 163 is provided between the second regions165 and the third regions 167 which are low resistance regions. Withsuch a structure, the resistance between the channel regions and thesource or drain region can be reduced, and the on-state current of thetransistor can be increased.

By providing the protective film 113 over the transistor (here, thetransistors 140, 150, and 160), the transistor can have excellentelectric characteristics. In addition, the transistor can have highreliability where a variation in electric characteristics with time or avariation in electric characteristics due to a gate BT stress test underlight is small.

Note that in each of the transistors 140, 150, and 160, oxygen containedin the protective film 113 transfers to the oxide semiconductor filmthrough at least one of the base insulating film 103 and the gateinsulating film 109.

Note that the structures, methods, and the like described in thisembodiment can be used as appropriate in combination with any of thestructures, methods, and the like described in the other embodiments andexamples.

Embodiment 6

In this embodiment, a transistor having a structure different from thoseof Embodiments 2 to 5 will be described with reference to FIG. 10 . Inthe transistor shown in this embodiment, a pair of electrodes overlapwith a gate electrode with a gate insulating film interposedtherebetween, which is different from the transistors of Embodiments 2to 5.

A transistor 170 illustrated in FIG. 10 includes an oxide semiconductorfilm 105 over the base insulating film 103, a pair of electrodes 107 incontact with the oxide semiconductor film 105, a gate insulating film109 in contact with the base insulating film 103, the oxidesemiconductor film 105, and the pair of electrodes 107, and a gateelectrode 171 overlapping with the oxide semiconductor film 105 with thegate insulating film 109 interposed therebetween. In addition, aprotective film 113 covering the gate insulating film 109 and the gateelectrode 171 is provided. Furthermore, a wiring 115 may be provided tobe in contact with the pair of electrodes 107 in openings formed in thegate insulating film 109 and the protective film 113.

In the transistor 170 in this embodiment, the pair of electrodes 107 andthe gate electrode 171 overlap with each other with the gate insulatingfilm 109 interposed therebetween. Thus, in the oxide semiconductor film105, a region facing the gate electrode 171 with the gate insulatingfilm 109 interposed therebetween functions as a channel region, andregions in contact with the pair of electrodes 107 function as a sourceregion and a drain region. In other words, the channel region and thesource or drain region are in contact with each other. There is noregion functioning as a resistance component between the channel regionand the source or drain region. Therefore, the on-state current and thefield effect mobility are higher than those of the transistors inEmbodiments 2 to 5.

Further, with a structure in which the protective film 113 is providedover the transistor 170, the transistor can have excellentcharacteristics in which the shift in the threshold voltage in thenegative direction can be suppressed. Furthermore, a highly reliabletransistor in which a variation in electric characteristics with time ora variation in electric characteristics due to a gate BT stress testunder light is small can be provided.

Note that in transistor 170, oxygen contained in the protective film 113transfers to the oxide semiconductor film 105 through at least one ofthe base insulating film 103 and the gate insulating film 109.

Note that the structures, methods, and the like described in thisembodiment can be used as appropriate in combination with any of thestructures, methods, and the like described in the other embodiments andexamples.

Embodiment 7

In this embodiment, a transistor having a different structure from thoseof Embodiments 1 to 6 will be described with reference to FIGS. 11A and11B.

A transistor 210 illustrated in FIG. 11A includes an oxide semiconductorfilm 211 over the base insulating film 103, a gate insulating film 109in contact with the base insulating film 103 and the oxide semiconductorfilm 211, and a gate electrode 111 overlapping with the oxidesemiconductor film 211 with the gate insulating film 109 interposedtherebetween. In addition, a protective film 217 covering the gateinsulating film 109 and the gate electrode 111 is provided, and a wiring219 is also provided to be in contact with the oxide semiconductor film211 through openings formed in the gate insulating film 109 and theprotective film 217.

In the transistor 210 in this embodiment, the oxide semiconductor film211 includes a first region 213 overlapping with the gate electrode 111with the gate insulating film 109 interposed therebetween and a pair ofsecond regions 215 to which dopant is added. Note that dopant is notadded to the first region 213. Further, the pair of second regions 215is provided so that the first region 213 is sandwiched therebetween.

The first region 213 functions as a channel region in the transistor210. The second regions 215 function as a source region and a drainregion.

The dopant similar to that added to the second regions 125 in Embodiment3 can be used as appropriate for the dopant added to the second regions215.

The dopant concentration and the conductivity in the second regions 215can be equal to those in the second regions 125 in Embodiment 3.

The transistor 220 illustrated in FIG. 11B includes the oxidesemiconductor film 211 over the base insulating film 103, a pair ofelectrodes 225 functioning as a source electrode and a drain electrodein contact with the oxide semiconductor film 211, a gate insulating film223 in contact with at least part of the oxide semiconductor film 211,and the gate electrode 111 over the gate insulating film 223 andoverlapping with the oxide semiconductor film 211.

Further, the transistor includes sidewall insulating films 221 incontact with side surfaces of the gate electrode 111. Moreover, aprotective film 217 is provided over the base insulating film 103, thegate electrode 111, the sidewall insulating films 221 and the pair ofelectrodes 225. In addition, the wiring 219 is provided to be in contactwith the oxide semiconductor film 211 though openings formed in theprotective film 217.

In the transistor in FIG. 11B, the oxide semiconductor film 211 includesthe first region 213 overlapping with the gate electrode 111 with thegate insulating film 223 interposed therebetween and a pair of secondregions 215 to which dopant is added. Note that dopant is not added tothe first region 213. The pair of second regions 215 is provided so thatthe first region 213 is sandwiched therebetween.

End portions of the pair of electrodes 225 in the transistor arepositioned over the sidewall insulating films 221, and the pair ofelectrodes 225 completely covers an exposed portion of the pair ofsecond regions 215 including the dopant in the oxide semiconductor film211. Thus, in the channel length direction, the distance between thesource and the drain (more precisely, the distance in the oxidesemiconductor film 211 between a portion in contact with the one of thepair of electrodes 225 and a portion in contact with the other of theelectrodes) can be controlled by the lengths of the sidewall insulatingfilms 221. That is, in a minute device in which patterning using a maskis difficult, end portions on the channel side of the pair of electrodes225 in contact with the oxide semiconductor film 211 can be formedwithout a mask. Further, because a mask is not used, variation of aplurality of transistors due to process can be reduced.

The protective film 217 provided over each of the transistors 210 and220 in this embodiment is an oxide insulating film containing oxygen inexcess of the stoichiometric composition, like the protective film 23 inEmbodiment 1. Further, it is preferable that the protective film 217contain a larger amount of oxygen than the amount of oxygen vacancies inthe oxide semiconductor film 211. The oxide insulating film containingoxygen in excess of the stoichiometric composition is an oxideinsulating film from which part of oxygen is released by heating. Thus,with use of the oxide insulating film from which part of oxygen isreleased by heating as the protective film, oxygen can be diffused tothe oxide semiconductor film by heat treatment, and oxygen vacancies inthe oxide semiconductor film 211 can be filled. As a result, the amountof oxygen vacancies in the oxide semiconductor film 211 can be reduced,and a shift in the threshold voltage of the transistor in the negativedirection can be suppressed. Moreover, a highly reliable transistor inwhich a variation in the threshold voltage with time or a variation inthe threshold voltage due to a gate BT stress test under light is smallcan be provided.

Further, the transistor can have such excellent electric characteristicsthat the spin density of a signal at g=2.001 in the protective film 217,which is measured by electron spin resonance, is lower than 1.5×10¹⁸spins/cm³, preferably lower than or equal to 1.0×10¹⁸ spins/cm³.

Note that in the transistor 220, oxygen contained in the protective film217 transfers to the oxide semiconductor film 211 through at least oneof the base insulating film 103, the, gate insulating film 223, and thesidewall insulating films 221.

Note that the structures, methods, and the like described in thisembodiment can be used as appropriate in combination with any of thestructures, methods, and the like described in the other embodiments andexamples.

Embodiment 8

In this embodiment, a transistor having a different structure from thoseof Embodiments 1 to 7 will be described with reference to FIG. 12 . Atransistor in this embodiment includes a plurality of gate electrodesfacing each other with an oxide semiconductor film interposedtherebetween. Note that in this embodiment, description is made usingthe transistor shown in Embodiment 6; however, this embodiment can becombined with the other embodiments as appropriate.

A transistor 230 illustrated in FIG. 12 includes a gate electrode 231over a substrate 101 and an insulating film 233 covering the gateelectrode 231. Further, the transistor includes an oxide semiconductorfilm 105 over the insulating film 233, a pair of electrodes 107 incontact with the oxide semiconductor film 105, a gate insulating film109 in contact with the insulating film 233, the oxide semiconductorfilm 105, and the pair of electrodes 107, and a gate electrode 171overlapping with the oxide semiconductor film 105 with the gateinsulating film 109 interposed therebetween. In addition, a protectivefilm 113 covering the gate insulating film 109 and the gate electrode171 is provided. Furthermore, a wiring 115 may be provided to be incontact with the pair of electrodes 107 through openings formed in thegate insulating film 109 and the protective film 113.

The gate electrode 231 can be formed in a manner similar to that of thegate electrode 15 in Embodiment 1. The gate electrode 231 preferably hasa tapered side surface in order to improve coverage of the insulatingfilm 233 that is to be formed. The angle between the substrate 101 andthe gate electrode 231 is greater than or equal to 20° and less than orequal to 70°, preferably greater than or equal to 30° and less than orequal to 60°.

The insulating film 233 can be formed in a manner similar to that of thebase insulating film 103 in Embodiment 2. Note that the insulating film233 preferably has a flat surface because the oxide semiconductor film105 is formed over the insulating film 233 in a later step. Thus, aninsulating film that is to be the insulating film 233 is formed over thesubstrate 101 and the gate electrode 231, and the insulating film issubjected to planarization treatment, so that the insulating film 233with less surface unevenness is formed.

The transistor 230 in this embodiment has the gate electrode 231 and thegate electrode 171 facing each other with the oxide semiconductor film105 interposed therebetween. By application of different potentials tothe gate electrode 231 and the gate electrode 171, the threshold voltageof the transistor 230 is preferably controlled: the threshold voltagecan be made to shift in the positive direction.

The protective film 113 is provided over the transistor 230 in thisembodiment. The protective film 113 is an oxide insulating filmcontaining in excess of the stoichiometric composition, like theprotective film 23 in Embodiment 1. It is preferable that the protectivefilm 113 contain a larger amount of oxygen than the amount of oxygenvacancies in the oxide semiconductor film 105. As a result, the amountof oxygen vacancies in the oxide semiconductor film 105 is reduced,which leads to suppression of a shift of the threshold voltage in thenegative direction. Moreover, a highly reliable transistor in which avariation in the threshold voltage with time or a variation in thethreshold voltage due to a gate BT stress test under light is small canbe provided.

Embodiment 9

In this embodiment, a method for manufacturing a transistor in which thehydrogen concentration in an oxide semiconductor film is reduced will bedescribed. Such a transistor is any of the transistors described inEmbodiments 1 to 8. Here, description is made with use of Embodiments 1and 2 typically; however, this embodiment can be combined with any ofthe other embodiments as appropriate. Note that at least one of stepsdescribed in this embodiment has to be combined with the process ofmanufacturing the transistor described in any of Embodiments 1 and 2; itis not necessary to combine all steps therewith.

In each of the oxide semiconductor film 19 in Embodiment 1 and the oxidesemiconductor film 105 in Embodiment 2, the hydrogen concentration islower than 5×10¹⁹ atoms/cm³, preferably lower than 5×10¹⁸ atoms/cm³,further preferably lower than or equal to 1×10¹⁸ atoms/cm³, stillfurther preferably lower than or equal to 5×10¹⁷ atoms/cm³, yet furtherpreferably lower than or equal to 1×10¹⁶ atoms/cm³.

Hydrogen contained in each of the oxide semiconductor films 19 and 105reacts with oxygen bonded to a metal atom to produce water, and a defectis formed in a lattice from which oxygen is released (or a portion fromwhich oxygen is removed). In addition, a bond of hydrogen and oxygencauses generation of electrons serving as carrier. Thus, the impuritiescontaining hydrogen are reduced as much as possible in the step offorming the oxide semiconductor film, whereby the hydrogen concentrationin the oxide semiconductor film can be reduced. When an oxidesemiconductor which is highly purified by removing hydrogen as much aspossible is used as a channel region, a shift of the threshold voltagein the negative direction can be reduced, and the leakage currentbetween a source and a drain of the transistor (typically, the off-statecurrent per channel width) can be decreased to several yA/μm to severalzA/μm. As a result, electric characteristics of the transistor can beimproved.

One of methods (a first method) of reducing the hydrogen concentrationin the oxide semiconductor film 19 is as follows: before the oxidesemiconductor film 19 is formed, hydrogen or water contained in each ofthe substrate 11, the base insulating film 13, the gate electrode 15,and the gate insulating film 17 is released by heat treatment or plasmatreatment. As a result of this method, hydrogen or water attached to orcontained in the substrate 11 to the gate insulating film 17 can beprevented from diffusing into the oxide semiconductor film 19 byperforming heat treatment in a later step. The heat treatment isperformed at a temperature higher than or equal to 100° C. and lowerthan the strain point of the substrate in an inert atmosphere, areduced-pressure atmosphere, or a dry air atmosphere. Further, for theplasma treatment, rare gas, oxygen, nitrogen, or nitrogen oxide (e.g.,nitrous oxide, dinitrogen monoxide, or nitrogen dioxide) is used. Notethat in Embodiments 2 to 8, before the oxide semiconductor film 105 isformed, hydrogen or water contained in each of the substrate 101 and thebase insulating film 103 is released by heat treatment or plasmatreatment.

Another method (a second method) of reducing the hydrogen concentrationin the oxide semiconductor films 19 and 105 is as follows: before theoxide semiconductor film is formed with a sputtering apparatus, a dummysubstrate is put into the sputtering apparatus, and an oxidesemiconductor film is formed over the dummy substrate, so that hydrogen,water, and the like attached to the target surface or a depositionshield are removed. As a result, entry of hydrogen, water, or the likeinto the oxide semiconductor film can be suppressed.

Another method (a third method) of reducing the hydrogen concentrationin the oxide semiconductor films 19 and 105 is as follows: in the casewhere an oxide semiconductor film is formed by a sputtering method, forexample, an oxide semiconductor film is deposited at a substratetemperature higher than or equal to 150° C. and lower than or equal to750° C., preferably higher than or equal to 150° C. and lower than orequal to 450° C., further preferably higher than or equal to 200° C. andlower than or equal to 350° C. As a result of this method, entry ofhydrogen, water, or the like into the oxide semiconductor film can besuppressed.

Here, a sputtering apparatus with which the oxide semiconductor films 19and 105 can be formed to have a low hydrogen concentration is describedin detail below.

The leakage rate of a treatment chamber in which the oxide semiconductorfilm is formed is preferably lower than or equal to 1×10⁻¹⁰ Pa·m³/sec.,whereby entry of hydrogen, water, or the like into the film to be formedby a sputtering method can be decreased.

Evacuation of the treatment chamber in the sputtering apparatus ispreferably performed with a rough vacuum pump such as a dry pump and ahigh vacuum pump such as a sputter ion pump, a turbo molecular pump, ora cryopump in appropriate combination. The turbo molecular pump has anoutstanding capability in evacuating a large-sized molecule, whereas ithas a low capability in evacuating hydrogen and water. Further, acombination with a sputter ion pump having a high capability inevacuating hydrogen or a cryopump having a high capability in evacuatingwater is effective.

An adsorbate present at the inner wall of the treatment chamber does notaffect the pressure in the treatment chamber because it is adsorbed onthe inner wall, but the adsorbate leads to release of a gas at the timeof the evacuation of the treatment chamber. Therefore, although theleakage rate and the evacuation rate do not have a correlation, it isimportant that the adsorbate present in the treatment chamber bedesorbed as much as possible and evacuation be performed in advance withuse of a pump having high evacuation capability. Note that the treatmentchamber may be subjected to baking for promotion of desorption of theadsorbate. By the baking, the rate of desorption of the adsorbate can beincreased about tenfold. The baking should be performed at a temperaturegreater than or equal to 100° C. and less than or equal to 450° C. Atthis time, when the adsorbate is removed while an inert gas isintroduced, the rate of desorption of water or the like, which isdifficult to desorb only by evacuation, can be further increased.

As described above, in the process for forming the oxide semiconductorfilm, entry of impurities is suppressed as much as possible throughcontrol of the pressure of the treatment chamber, leakage rate of thetreatment chamber, and the like, whereby entry of hydrogen, water, orthe like into the oxide semiconductor film can be reduced.

Another method (a fourth method) of reducing the hydrogen concentrationin the oxide semiconductor films 19 and 105 is as follows: a high-puritygas from which an impurity including hydrogen is removed is used asource gas. As a result of this method, entry of hydrogen, water, or thelike into the oxide semiconductor film can be suppressed.

Another method (a fifth method) of reducing the hydrogen concentrationin the oxide semiconductor films 19 and 105 is as follows: heattreatment is performed after the oxide semiconductor film is formed. Bythe heat treatment, dehydrogenation or dehydration of the oxidesemiconductor film can be performed.

The temperature of the heat treatment is typically higher than or equalto 150° C. and lower than the strain point of the substrate, preferablyhigher than or equal to 250° C. and lower than or equal to 450° C.,further preferably higher than or equal to 300° C. and lower than orequal to 450° C.

The heat treatment is performed in an inert gas atmosphere containingnitrogen or a rare gas such as helium, neon, argon, xenon, or krypton.Alternatively, the heat treatment may be performed in an inert gasatmosphere first, and then in an oxygen atmosphere. It is preferablethat the above inert gas atmosphere and the above oxygen atmosphere donot contain hydrogen, water, and the like. The treatment time is 3minutes to 24 hours.

After the oxide semiconductor films 19 and 105 which have been subjectedto element isolation are formed as illustrated in FIG. 2B and FIG. 6A,the heat treatment for dehydration or dehydrogenation can be performed.Through the above step, hydrogen, water, or the like included in thegate insulating film 17 or the base insulating film 103 can beefficiently released in the treatment for dehydration ordehydrogenation.

The heat treatment for dehydration or dehydrogenation may be performedplural times, and may also serve as another heat treatment.

At least one of the first to fifth methods of reducing the hydrogenconcentration in the oxide semiconductor film is combined with any ofthe methods for manufacturing a transistor described in Embodiments 1 to8, which makes it possible to manufacture a transistor in which a highlypurified oxide semiconductor film from which hydrogen, water, or thelike is removed as much as possible can be used for a channel region. Asa result, a shift in the threshold voltage of the transistor in thenegative direction can be reduced, and the leakage current between asource and a drain of the transistor (typically, the off-state currentper channel width) can be decreased to several yA/μm to several zA/μm.Thus, electric characteristics of the transistor can be improved.According to the description of this embodiment, a transistor havingexcellent electric characteristics in which a shift in the thresholdvoltage of the transistor in the negative direction is reduced and theamount of leakage current is small can be manufactured.

Embodiment 10

In this embodiment, a semiconductor device which includes a transistorincluding a first semiconductor material in a lower portion and atransistor including a second semiconductor material in an upper portionand in which the transistor including the first semiconductor materialincludes a semiconductor substrate is described with reference to FIG.13 .

FIG. 13 illustrates an example of a cross-sectional structure of thesemiconductor device that includes the transistor including the firstsemiconductor material in the lower portion and the transistor includingthe second semiconductor material in the upper portion. Here, the firstsemiconductor material and the second semiconductor material aredifferent from each other. For example, a semiconductor material otherthan an oxide semiconductor can be used as the first semiconductormaterial, and an oxide semiconductor can be used as the secondsemiconductor material. The semiconductor material other than an oxidesemiconductor may be, for example, silicon, germanium, silicongermanium, silicon carbide, gallium arsenide, or the like and ispreferably a single crystal semiconductor or a polycrystallinesemiconductor. A transistor formed using single crystal semiconductorcan operate at high speed easily. In contrast, a transistor formed usingan oxide semiconductor can be used for a circuit utilizingcharacteristics of sufficiently low off-state current per channel width,which is approximately several yA/μm to several zA/μm. Thus, a logiccircuit with low power consumption can be formed using the semiconductordevice illustrated in FIG. 13 . Alternatively, an organic semiconductormaterial or the like may be used as the first semiconductor material.

Either an n-channel transistor (NMOSFET) or a p-channel transistor(PMOSFET) can be used as each of transistors 704 a, 704 b, and 704 c.Here, as the transistors 704 a and 704 b, p-channel transistors areused, and as the transistor 704 c, an n-channel transistor is used. Inthe example illustrated in FIG. 13 , the transistors 704 a and 704 b inone island are electrically isolated from other elements by a shallowtrench isolation (STI) 702. On the other hand, the transistor 704 c inanother island is electrically isolated from the transistors 704 a and704 b by the STI 702. The use of the STI 702 can reduce the generationof a bird's beak in an element isolation region, which is caused in anLOCOS element isolation method, and can reduce the size of the elementisolation region. On the other hand, in a semiconductor device in whicha transistor is not required to be structurally miniaturized ordownsized, the STI 702 is not necessarily formed, and an elementisolation means such as LOCOS can be used.

The transistors 704 a, 704 b, and 704 c in FIG. 13 each include achannel region provided in a substrate 701, impurity regions 705 (alsoreferred to as a source region and a drain region) provided such thatthe channel formation region is provided therebetween, a gate insulatingfilm 706 provided over the channel region, and gate electrodes 707 and708 provided over the gate insulating film 706 so as to overlap with thechannel region. A gate electrode can have, but is not limited to, astacked structure of the gate electrode 707 including a first materialfor increasing processing accuracy and the gate electrode 708 includinga second material for decreasing the resistance as a wiring; thematerial, the number of stacked layers, the shape, or the like can beadjusted as appropriate for required specifications. Note that atransistor whose source electrode and drain electrode are notillustrated in a drawing may also be referred to as a transistor for thesake of convenience.

Further, contact plugs 714 a are connected to the impurity regions 705provided in the substrate 701. Here, the contact plugs 714 a alsofunction as a source electrode and a drain electrode of the transistor704 a or the like. In addition, impurity regions which are differentfrom the impurity regions 705 are provided between the impurity regions705 and the channel region. The impurity regions function as LDD regionsor extension regions for controlling the distribution of an electricfield in the vicinity of the channel region, depending on theconcentration of an impurity introduced thereto. Sidewall insulatingfilms 710 are provided at side surfaces of the gate electrodes 707 and708 with an insulating film 709 provided therebetween. By using theinsulating film 709 and the sidewall insulating films 710, the LDDregions or extension regions can be formed.

The transistors 704 a, 704 b, and 704 c are covered with an insulatingfilm 711. The insulating film 711 can function as a protective film andcan prevent impurities from entering the channel region from theoutside. In addition, when the insulating film 711 is formed using amaterial such as silicon nitride by a CVD method, in the case wheresingle crystal silicon is used for the channel region, hydrogenation ofsingle crystal silicon can be performed by heat treatment. When aninsulating film having tensile stress or compressive stress is used asthe insulating film 711, distortion can be caused in the semiconductormaterial in the channel region. By subjecting a silicon material in thechannel region to tensile stress in the case of an n-channel transistoror subjecting a silicon material in the channel region to compressivestress in the case of a p-channel transistor, the mobility of thetransistor can be improved.

Here, the transistor 750 in FIG. 13 has a structure similar to that ofthe transistor 170 in Embodiment 6. A base insulating film of thetransistor 750 has a two-layer structure including an insulating film725 a and an insulating film 725 b, and a gate electrode 751 is providedto face an oxide semiconductor film of the transistor 750 with the baseinsulating film provided therebetween. The insulating film 725 a ispreferably formed using an insulating film having a function of blockinghydrogen, water, and oxygen so that oxygen can be prevented fromdiffusing from the oxide semiconductor film to the outside, and hydrogenand water can be prevented from entering the oxide semiconductor filmfrom the outside. The insulating film having a function of blockinghydrogen, water, and oxygen is typically formed using an aluminum oxidefilm. For the insulating film 725 b, the base insulating film 103 inEmbodiment 2 can be used as appropriate.

Although the transistor 170 in Embodiment 6 is used for description ofthe transistor 750, any of the transistors in Embodiments 1 to 9 can beused as appropriate.

The transistor 750 including the second semiconductor material iselectrically connected to a transistor including the first semiconductormaterial in a lower layer, such as the transistor 704 a, depending on aneeded circuit configuration. FIG. 13 illustrates an example structurein which a source or a drain of the transistor 750 is electricallyconnected to a source or a drain of the transistor 704 a.

One of the source and the drain of the transistor 750 including thesecond semiconductor material is connected to a wiring 734 a formedabove the transistor 750, through a contact plug 730 b penetrating agate insulating film 726 of the transistor 750 and insulating films 727,728, and 729. For the gate insulating film 726 and the insulating film727, any of the structures and materials described in Embodiments 1 to 9can be used as appropriate.

The wiring 734 a is embedded in an insulating film 731. For the wiring734 a, it is preferable to use a low-resistance conductive material suchas copper or aluminum. By using a low-resistance conductive material, RCdelay of signals transmitted through the wiring 734 a can be reduced. Inthe case of using copper for the wiring 734 a, a barrier film 733 isformed in order to prevent copper from diffusing into the channelregion. The barrier film can be formed using a film of tantalum nitride,a stacked-layer film of tantalum nitride and tantalum, a film oftitanium nitride, a stacked-layer film of titanium nitride and titanium,or the like for example, but are not limited to the films of thesematerials as long as their function of preventing diffusion of a wiringmaterial and their adhesion to the wiring material, a base film, or thelike are secured. The barrier film 733 may be formed as a layer that isseparate from the wiring 734 a, or may be formed in such a manner that abarrier film material contained in a wiring material is separated out byheat treatment to the inner walls of the openings provided in theinsulating film 731.

For the insulating film 731, it is possible to use an insulator such assilicon oxide, silicon oxynitride, silicon nitride oxide,borophosphosilicate glass (BPSG), phosphosilicate glass (PSG), siliconoxide to which carbon is added (SiOC), silicon oxide to which fluorineis added (SiOF), tetraethylorthosilicate (TEOS) which is silicon oxidemade from Si(OC₂H₅)₄, hydrogen silsesquioxane (HSQ), methylsilsesquioxane (MSQ), organosilicate glass (OSG), or anorganic-polymer-based material. In particular, in the case of advancingminiaturization of the semiconductor device, parasitic capacitancebetween wirings is significant and signal delay is increased. Therefore,the relative permittivity of silicon oxide (k=4.0 to 4.5) is too high,and it is preferable to use a material with k=3.0 or less. In addition,since CMP treatment is performed after the wiring is embedded in theinsulating film, the insulating film needs to have high mechanicalstrength. As long as their mechanical strength can be secured, theinsulating film can be made porous to have a lower dielectric constant.The insulating film 731 is formed by a sputtering method, a CVD method,a coating method including a spin coating method (also referred to asspin on glass (SOG)), or the like.

An insulating film 732 may be provided over the insulating film 731. Theinsulating film 732 functions as an etching stopper when planarizationtreatment by CMP or the like is performed after the wiring material isembedded in the insulating film 731.

Over the wiring 734 a, a barrier film 735 is provided, and over thebarrier film 735, a protective film 740 is provided. The barrier film735 is provided in order to prevent diffusion of the wiring materialsuch as copper. The barrier film 735 may be formed not only over asurface of the wiring 734 a but also over the insulating films 731 and732. The barrier film 735 can be formed using an insulating materialsuch as silicon nitride, SiC, or SiBON. However, when the barrier film735 is thick, capacitance between wirings is increased; thus, a materialhaving barrier properties and a low dielectric constant is preferablyselected.

The wiring 734 a is connected to a wiring 723 provided in a lower layerthan a barrier film 724 through a contact plug 730 a. The contact plug730 a is electrically connected to the wiring 723 through the barrierfilm 724, the insulating films 725 a and 725 b, the gate insulating film726, the insulating films 727, 728, and 729, which is different from thecontact plug 730 b. Thus, the contact plug 730 a has a larger heightthan the contact plug 730 b. In the case where the diameter of thecontact plug 730 a is the same as that of the contact plug 730 b, theaspect ratio of the contact plug 730 a is larger than that of thecontact plug 730 b. The diameter of the contact plug 730 a may bedifferent from that of the contact plug 730 b. The contact plug 730 a isillustrated like a continuous plug formed using one material; however, acontact plug penetrating the barrier film 724 and the insulating films725 a and 725 b and a contact plug penetrating the gate insulating film726 and the insulating films 727, 728, and 729 may be separately formed.

In a manner similar to that of the wiring 734 a and a wiring 734 b, thewiring 723 is covered with a barrier film 722 and the barrier film 724and embedded in the insulating film 720. As illustrated in FIG. 13 , thewiring 723 includes an upper wiring portion and a lower via holeportion. The lower via hole portion is connected to a wiring 718 in alower layer. The wiring 723 having this structure can be formed by aso-called dual damascene method or the like. Wirings in upper and lowerlayers may be connected using a contact plug instead of the dualdamascene method. An insulating film 721 functioning as an etchingstopper when planarization treatment such as CMP is performed may beprovided over the insulating film 720.

The wiring 718 electrically connected to the wiring 723 can also beformed to have a structure similar to that of the above-described wiringlayer above the transistor 750. The transistor 704 a in which the firstsemiconductor material such as silicon is used for the channel region isconnected to the wiring 718 through a contact plug 714 a penetrating theinsulating film 711, an insulating film 712, and an insulating film 713.A gate electrode of the transistor 704 c in which the firstsemiconductor material such as silicon is used for the channel region isconnected to the wiring 718 through a contact plug 714 b penetrating theinsulating film 711, an insulating film 712, and an insulating film 713.The wiring 718 is covered with barrier films 717 and 719 and embedded inan insulating film 715, which is a manner similar to those of thewirings 734 a and 734 b. Over the insulating film 715, an insulatingfilm 716 functioning as an etching stopper when planarization treatmentsuch as CMP is performed may be provided.

As described above, through a plurality of contact plugs and a pluralityof wirings, the transistor 704 a, which includes the first semiconductormaterial and is provided in the lower portion of the semiconductordevice, is electrically connected to the transistor 750, which includesthe second semiconductor material and is provided in the upper portionof the semiconductor device. With the above-described structure in whichthe transistor including the first semiconductor material and beingcapable of operating at high speed is combined with the transistorincluding the second semiconductor material and having significantly lowoff-state current, a semiconductor device including a logic circuitcapable of operating at high speed with low power consumption can bemanufactured.

Such a semiconductor device is not limited to the above structure andcan be changed as desired unless they deviate from the spirit of thepresent invention. For example, in the above description, two wiringlayers are provided between the transistor including the firstsemiconductor material and the transistor including the secondsemiconductor material, but one wiring layer or three or more wiringlayers may be provided, or without wirings, the transistors may bedirectly connected through only a contact plug. In this case, athrough-silicon via (TSV) technique can also be used, for example. Inaddition, in the above description, a material such as copper isembedded in an insulating film to form a wiring, but a wiring having athree-layer structure of a barrier film, a wiring material layer, abarrier film, for example, may be obtained by patterning through aphotolithography process.

In the case where a copper wiring is formed in a tier between thetransistors 704 a and 704 b including the first semiconductor materialand the transistor 750 including the second semiconductor material, itis particularly necessary to take into consideration the influence ofheat treatment performed in the process for manufacturing the transistor750 including the second semiconductor material. In other words, it isnecessary to take care that the temperature of heat treatment performedin the process for manufacturing the transistor 750 including the secondsemiconductor material is appropriate to the properties of the wiringmaterial. This is because, in the case where high-temperature heattreatment is performed on a component of the transistor 750 for example,thermal stress is caused in case of using the copper wiring, leading toa problem such as stress migration.

Embodiment 11

As examples of the semiconductor device described in any of the aboveembodiments, a central processing unit, a microprocessor, amicrocomputer, a memory device, an image sensor, an electro-opticaldevice, a light-emitting display device, and the like can be given. Thesemiconductor device can be applied to a variety of electronic devices.Examples of the electronic devices are as follows: display devices,lighting devices, personal computers, word processors, image reproducingdevices, portable compact disc (CD) players, radio receivers, taperecorders, headphone stereos, stereos, clocks, cordless phone handsets,transceivers, portable wireless devices, cellular phones, smart phones,electronic books, car phones, portable game machines, calculators,portable information terminals, e-book readers, electronic translators,audio input devices, cameras such as video cameras or digital stillcameras, electric shavers, high-frequency heating appliances, electricrice cookers, electric washing machines, electric vacuum cleaners, waterheaters, electric fans, hair dryers, air conditioners, humidifiers,dehumidifiers, air-conditioning systems, dishwashing machines, dishdrying machines, clothes dryers, futon dryers, electric refrigerators,electric freezers, electric refrigerator-freezers, freezers forpreserving DNA, flashlights, electric power tools, smoke detectors,medical equipments, guide lights, traffic lights, belt conveyors,elevators, escalators, industrial robots, power storage systems,electric vehicles, hybrid electric vehicles, plug-in hybrid electricvehicles, tracked vehicles, motorized bicycles, motorcycles, electricwheelchairs, golf carts, boats, ships, submarines, helicopters,aircrafts, rockets, artificial satellites, space probes, planetaryprobes, and spacecrafts. In this embodiment, examples of application ofthe semiconductor device described in any of the above embodiments toportable devices such as cellular phones, smartphones, or e-book readersare described with reference to FIGS. 14A and 14B, FIG. 15 , FIG. 16 ,and FIG. 17 .

In portable electronic devices such as a cellular phone, a smart phone,and an e-book reader, an SRAM or a DRAM is used so as to store imagedata temporarily. This is because response speed of a flash memory islow and thus a flash memory is not suitable for image processing. On theother hand, an SRAM or a DRAM has the following characteristics whenused for temporary storage of image data.

In an ordinary SRAM, as illustrated in FIG. 14A, one memory cellincludes six transistors, that is, transistors 801 to 806, which aredriven with an X decoder 807 and a Y decoder 808. The transistors 803and 805 and the transistors 804 and 806 each serve as an inverter, andhigh-speed driving can be performed therewith. However, an SRAM has adisadvantage of large cell area because one memory cell includes sixtransistors. Provided that the minimum feature size of a design rule isF, the area of a memory cell in an SRAM is generally 100 F² to 150 F².Therefore, a price per bit of an SRAM is the most expensive among avariety of memory devices.

On the other hand, as illustrated in FIG. 14B, a memory cell in a DRAMincludes a transistor 811 and a storage capacitor 812, and is driven byan X decoder 813 and a Y decoder 814. One cell includes one transistorand one capacitor and has a small area. The area of a memory cell of aDRAM is generally less than or equal to 10 F². Note that in the case ofa DRAM, a refresh operation is always necessary and power is consumedeven when a rewriting operation is not performed.

However, with use of the transistor with low off-state current, which isdescribed in the above embodiment, for the transistor 811, electriccharge in the storage capacitor 812 can be held for a long time, andthus it is not necessary to perform refresh operation frequently.Therefore, the area of a memory cell can be decreased, and powerconsumption can be reduced.

Next, a block diagram of a portable device is illustrated in FIG. 15 .The portable device illustrated in FIG. 15 includes an RF circuit 901,an analog baseband circuit 902, a digital baseband circuit 903, abattery 904, a power supply circuit 905, an application processor 906, aflash memory 910, a display controller 911, a memory circuit 912, adisplay 913, a touch sensor 919, an audio circuit 917, a keyboard 918,and the like. The display 913 includes a display portion 914, a sourcedriver 915, and a gate driver 916. The application processor 906includes a central processing unit (CPU) 907, a DSP 908, and aninterface (IF) 909. In general, the memory circuit 912 includes an SRAMor a DRAM; by employing any of the semiconductor devices described inthe above embodiments for the memory circuit 912, writing and reading ofdata can be performed at high speed, data can be held for a long time,and power consumption can be sufficiently reduced. Further, the powerconsumption of the CPU 907 can be sufficiently reduced by employing thesemiconductor device described in any of the above embodiments for amain memory device for storing data or an instruction or a buffer memorydevice capable of high-speed writing and reading of data, such as aregister or a cache, which is included in the CPU 907.

FIG. 16 illustrates an example of using the semiconductor devicedescribed in any of the above embodiments in a memory circuit 950 for adisplay. The memory circuit 950 illustrated in FIG. 16 includes a memory952, a memory 953, a switch 954, a switch 955, and a memory controller951. Furthermore, the memory circuit is connected to a displaycontroller 956 which reads and controls image data input through asignal line (input image data) and data stored in the memories 952 and953 (stored image data), and is also connected to a display 957 whichdisplays an image based on a signal input from the display controller956.

First, image data (input image data A) is formed by an applicationprocessor (not shown). The input image data A is held in the memory 952though the switch 954. The image data (stored image data A) held in thememory 952 is transmitted and displayed to the display 957 through theswitch 955 and the display controller 956.

In the case where the input image data A is not changed, the storedimage data A is read from the memory 952 through the switch 955 by thedisplay controller 956 with a frequency of 30 Hz to 60 Hz in general.

Next, for example, when data displayed on the screen is rewritten by auser (that is, in the case where the input image data A is changed), newimage data (input image data B) is formed by the application processor.The input image data B is held in the memory 953 through the switch 954.The stored image data A is read periodically from the memory 952 throughthe switch 955 even during that time. After the completion of storingthe new image data (the stored image data B) in the memory 953, from thenext frame for the display 957, the stored image data B starts to beread, transmitted to the display 957 through the switch 955 and thedisplay controller 956, and displayed on the display 957. This readingoperation is continued until another new image data is held in thememory 952.

By alternately writing and reading image data to and from the memory 952and the memory 953 as described above, images are displayed on thedisplay 957. Note that the memory 952 and the memory 953 are not limitedto separate memories, and a single memory may be divided and used. Byemploying the semiconductor device described in any of the aboveembodiments for the memory 952 and the memory 953, data can be writtenand read at high speed and held for a long time, and power consumptioncan be sufficiently reduced.

Next, a block diagram of an e-book reader is illustrated in FIG. 17 .The e-book reader in FIG. 17 includes a battery 1001, a power supplycircuit 1002, a microprocessor 1003, a flash memory 1004, an audiocircuit 1005, a keyboard 1006, a memory circuit 1007, a touch panel1008, a display 1009, and a display controller 1010.

Here, the semiconductor device described in any of the above embodimentscan be used for the memory circuit 1007 in FIG. 17 . The memory circuit1007 has a function of temporarily storing the contents of a book. Forexample, users use a highlight function in some cases. When users readan e-book reader, they sometimes want to mark a specified place. Thismarking refers to a highlight function, and users can make differencefrom other places by, for example, changing the color of a letterdisplayed, underlining a word, making a letter bold, or changing thefont type of a letter. That is, there is a function of storing andholding information of a place specified by users. In order to saveinformation for a long time, the information may be copied into theflash memory 1004. Even in such a case, by employing the semiconductordevice described in any of the above embodiments, writing and reading ofdata can be performed at high speed, stored data can be held for a longtime, and power consumption can be sufficiently reduced.

As described above, the semiconductor device in any of the aboveembodiments is mounted on each of the portable devices described in thisembodiment. Therefore, a portable device in which writing and reading ofdata are performed at high speed, data is held for a long time, andpower consumption is sufficiently reduced, can be obtained.

The structures, methods, and the like described in this embodiment canbe combined as appropriate with any of the other structures, methods,and the like described in this embodiment or any of the structures,methods, and the like described in the other embodiments.

Example 1

In this example, characteristics of a silicon oxynitride film which isformed by the method for forming the protective film 23 described inEmbodiment 1 will be described. Specifically, results of thermaldesorption spectroscopy (TDS) conducted to analyze the amount of oxygencontained in the oxynitride silicon film formed by the above method areused for the description.

First, samples which were manufactured are described. Each of thesamples has a structure in which a 400-nm-thick silicon oxynitride filmis formed over a silicon wafer by employing the conditions for formingthe protective film 23 described in Embodiment 1.

The conditions for forming the silicon oxynitride film are as follows:the silicon wafer was placed in a treatment chamber of a plasma CVDapparatus; silane and dinitrogen monoxide which were source gases weresupplied at 160 sccm and 4000 sccm, respectively, into the treatmentchamber; the pressure of the treatment chamber was adjusted to 200 Pa;and a power of 1500 W was supplied with a high-frequency power supply of27.12 MHz. Further, the substrate temperature at which the siliconoxynitride film was formed was 220° C. The plasma CVD apparatus used inthis example was a parallel plate plasma CVD apparatus with an electrodearea of 6000 cm², and the power per unit area (power density) into whichthe supplied power is converted was 0.25 W/cm².

The sample manufactured by the above method is Sample A1.

Further, as a comparative example, Sample A2 in which a siliconoxynitride film is formed over a silicon wafer was manufactured with useof the plasma CVD apparatus used for manufacturing Sample A1. Thesilicon oxynitride film of Sample A2 was formed in the following manner:silane and dinitrogen monoxide were supplied at 30 sccm and 4000 sccm,respectively, into the treatment chamber; the pressure of the treatmentchamber was adjusted to 200 Pa; and a power of 150 W was supplied with ahigh-frequency power supply of 27.12 MHz. Note that the power per unitarea (power density) into which the power supplied to form the siliconoxynitride film of Sample A2 is converted was 0.025 W/cm².

Next, Sample A1 and Sample A2 were subjected to TDS analysis. FIG. 18shows the results of the TDS analysis. In FIG. 18 , the horizontal axisindicates the substrate temperature of Sample A1 and Sample A2, and thevertical axis indicates the peak intensity of a TDS spectrum.

In the TDS analysis, a peak observed at a region where the substratetemperature is higher than or equal to 300° C. and lower than or equalto 400° C. is a peak derived from a release of oxygen (specifically, anoxygen atom or an oxygen molecule) contained in the analyzed sample(here, Sample A1 and Sample A2) to the outside. Note that the totalamount of oxygen released to the outside corresponds to the integralvalue of a spectrum. In the case where the silicon oxynitride filmcontains oxygen in excess of the stoichiometric composition, it isconsidered that excess oxygen is easily released to the outside. Thus,with the degree of the peak intensity, the amount of oxygen contained inthe silicon oxynitride film can be estimated.

As shown in FIG. 18 , a peak of Sample A1 is higher than that of SampleA2. Here, the peak is derived from a release of oxygen to the outside.Thus, it is found that the amount of oxygen contained in the siliconoxynitride film in Sample A1 is larger than the amount of oxygencontained in the silicon oxynitride film in Sample A2.

Next, an effect of power supplied to form the insulating film by themethod for forming the protective film 23 described in Embodiment 1 isdescribed.

Samples which were manufactured are described below. Each of the sampleshad the same structure as Sample A1, but the power supplied to form thesilicon oxynitride film as the insulating film was 1000 W (0.17 W/cm²)or 2000 W (0.33 W/cm²). Note that the other conditions for forming thesilicon oxynitride film were the same as those of Sample A1.

Here, the sample obtained by supplying a power of 1000 W (0.17 W/cm²) isSample A3, and the sample obtained by supplying a power of 2000 W (0.33W/cm²) is Sample A4.

Sample A3 and Sample A4 were subjected to TDS analysis. The amount ofoxygen estimated by the TDS analysis is described above. FIG. 19A showsthe amounts of oxygen contained in Sample A1, Sample A3, Sample A4, andSample A2, which were estimated by the TDS analysis.

According to FIG. 19A, the higher the power supplied to form the siliconoxynitride film is, the larger the amount of oxygen contained in thesample is.

Next, an effect of pressure adjusted to form the insulating film by themethod for forming the protective film 23 described in Embodiment 1 isdescribed.

Samples which were manufactured are described below. Each of the sampleshad the same structure as Sample A1, but the pressure adjusted to formthe silicon oxynitride film was 120 Pa or 250 Pa. Note that the otherconditions for forming the silicon oxynitride film were the same asthose of Sample A1.

Here, the sample obtained under the pressure adjusted to 120 Pa isSample A5, and the sample obtained under the pressure adjusted to 250 Pais Sample A6.

Sample A5 and Sample A6 were subjected to TDS analysis. The amount ofoxygen estimated by the TDS analysis is described above. FIG. 19B showsthe amounts of oxygen contained in Sample A1, Sample A5, and Sample A6,which were estimated by the TDS analysis.

According to FIG. 19B, when the pressure adjusted to form the siliconoxynitride film is increased, the amount of oxygen contained in thesample is increased.

As described above, it is found that by using the method for forming theprotective film 23 described in Embodiment 1 for formation of a siliconoxynitride film, the silicon oxynitride film can contain oxygen inexcess of the stoichiometric composition. Part of oxygen contained inthe silicon oxynitride film is released by heating. Thus, when thesilicon oxynitride film is used as a protective film of a transistor,the released oxygen can be diffused into an oxide semiconductor film ofthe transistor. As a result, the transistor can have excellent electriccharacteristics.

Example 2

In this example, results of TDS analysis of samples with differentstructures from those of Example 1 will be described. The TDS analysiswas conducted to evaluate characteristics of a silicon oxynitride filmformed by the method for forming the protective film 23 described inEmbodiment 1.

The samples which were manufactured in this example each have a stackedstructure in which a 50-nm-thick silicon nitride film is formed over asilicon wafer and a 200-nm-thick silicon oxynitride film is formed overthe silicon nitride film.

The silicon nitride film was formed in the following manner: the siliconwafer was placed in a treatment chamber of a plasma CVD apparatus;silane and nitrogen were supplied at 50 sccm and 5000 sccm,respectively, into the treatment chamber; the pressure in the treatmentchamber was adjusted to 60 Pa; and a power of 150 W was supplied with ahigh-frequency power supply of 27.12 MHz. Further, the substratetemperature at which the silicon nitride film was formed was 350° C.Note that the plasma CVD apparatus used in this example is similar tothat of Example 1, and the power density into which the supplied poweris converted was 0.25 W/cm².

Then, over the silicon nitride film, a silicon oxynitride film wasformed in the following manner: silane and dinitrogen monoxide weresupplied at 160 sccm and 4000 sccm, respectively, into the treatmentchamber; the pressure in the treatment chamber was adjusted to 200 Pa;and a power of 1500 W (0.25 W/cm²) was supplied with a high-frequencypower supply of 27.12 MHz. Further, the substrate temperature at whichthe silicon oxynitride film was formed was 220° C. A sample formed inthis manner is as Sample B1.

In addition, Sample B2 in which over the silicon nitride film, a siliconoxynitride film was formed under different conditions from the above wasformed. The conditions for forming a silicon oxynitride film in SampleB2 are as follows: silane and dinitrogen monoxide were supplied at 100sccm and 3000 sccm, respectively, to the treatment chamber; the pressurein the treatment chamber was adjusted to 40 Pa; and a power of 1500 W(0.25 W/cm²) was supplied with a high-frequency power supply of 27.12MHz. Further, the substrate temperature at which the silicon oxynitridefilm was formed was 350° C.

Next, Sample B1 and Sample B2 were subjected to TDS analysis. FIGS. 20Aand 20B show the results of the TDS analysis. The TDS analysis in thisexample was conducted in a manner similar to that in Example 1. In eachof FIGS. 20A and 20B, the horizontal axis indicates the substratetemperature of Sample B1 and Sample B2, and the vertical axis indicatesthe peak intensity of a TDS spectrum.

FIG. 20A indicates spectra representing the amounts of oxygen releasedfrom Sample B1 and Sample B2 to the outside. FIG. 20B indicates spectrarepresenting the amounts of moisture released from Sample B1 and SampleB2 to the outside. As in Example 1, with the degrees of the peakintensities in FIGS. 20A and 20B, the amount of oxygen and the amount ofmoisture contained in the silicon oxynitride films in Sample B1 andSample B2 can be estimated.

According to FIG. 20A, a peak of Sample B1 is higher than that of SampleB2. Here, the peak is derived from a release of oxygen to the outside.Thus, it is found that the amount of oxygen contained in the siliconoxynitride film in Sample B1 is larger than the amount of oxygencontained in the silicon oxynitride film in Sample B2.

From the above results, it is found that by using the method for formingthe protective film 23 described in Embodiment 1 (the substratetemperature was higher than or equal to 180° C. and lower than or equalto 250° C.) for formation of a silicon oxynitride film, the siliconoxynitride film can contain oxygen in excess of the stoichiometriccomposition.

According to FIG. 20B, a peak of Sample B1 is higher than that of SampleB2. Here, the peak is derived from a release of moisture to the outside.Note that the peak around a substrate temperature of 100° C. is derivedfrom a release of adsorbed moisture. This result indicates that SampleB1 has a sparse film compared with that in Sample B2, so that moistureeasily adsorbs thereon. In other words, the amount of moisture containedin the silicon oxynitride film in Sample B1 is larger than that inSample B2, which is probably caused by the facts that the flow rate ofsilane in forming the silicon oxynitride film in Sample B1 is higherthan that of silane in forming the silicon oxynitride film in Sample B2and that the temperature substrate of Sample B1 is lower than that ofSample B2.

Example 3

In this example, the amount of defects generated in an oxidesemiconductor film at the time when a silicon oxynitride film is formedover the oxide semiconductor film will be described. Specifically, theresults of ESR measurement and the results of constant photocurrentmethod (CPM) conducted on samples in each of which a silicon oxynitridefilm is formed over an oxide semiconductor film are used fordescription.

First, the results of ESR measurement are described. Samples which weremanufactured are described below. Each of the samples which weremanufactured has a stacked structure in which a 100-nm-thick oxidesemiconductor film is formed over a quartz substrate and a 400-nm-thicksilicon oxynitride film is formed over the oxide semiconductor film.

An IGZO film which is a CAAC-OS film was formed over the quartzsubstrate. The IGZO film was formed in such a manner that a sputteringtarget where In:Ga:Zn=1:1:1 (atomic ratio) was used, argon and oxygenwere supplied as a sputtering gas into a treatment chamber of asputtering apparatus at a flow rate of 50 sccm for each, and filmformation was performed at a DC power of 5 kW with the pressure in thetreatment chamber adjusted to 0.6 Pa. Note that the IGZO film was formedat a substrate temperature of 170° C. After the IGZO film was formed,first heat treatment was performed in a nitrogen atmosphere, and thensecond heat treatment was performed in an atmosphere containing nitrogenand oxygen. The temperature of each of the first heat treatment and thesecond heat treatment was 350° C., and treatment time for each of thefirst heat treatment and the second heat treatment was 1 hour.

Next, a silicon oxynitride film was formed in the following manner: thequartz substrate over which the IGZO film was formed was placed in atreatment chamber of a plasma CVD apparatus; silane and dinitrogenmonoxide which were a source gas were supplied at 160 sccm and 4000sccm, respectively, to the treatment chamber; the pressure of thetreatment chamber was adjusted to 120 Pa; and a power was supplied witha high-frequency power of 27.12 MHz. Note that the plasma CVD apparatusindicates a parallel plate plasma CVD apparatus with an electrode areaof 6000 cm². There were three conditions of the supplied power (powerdensity). The sample formed with a power of 1000 W (0.17 W/cm²) isSample C1, the sample formed with a power of 1500 W (0.25 W/cm²) isSample C2, and the sample formed with a power of 2000 W (0.33 W/cm²) isSample C3.

Then, ESR measurement was performed on Sample C1 to Sample C3. Theconditions of the ESR measurement are as follows. The measurementtemperature was room temperature (25° C.), a high-frequency power (powerof microwaves) of 9.2 GHz was 20 mW, and the direction of a magneticfield was parallel to a surface of each of the silicon oxynitride filmsin the samples. The lower limit of the detection of the number of spinsper unit area of a signal at g=1.93, which is due to oxygen vacancies inthe IGZO film, was 1.0×10¹² spins/cm².

Results of the ESR measurement are shown in FIG. 21 . FIG. 21 shows arelation between power supplied to form the silicon oxynitride film andthe number of spins per unit area of a signal at g=1.93 in the oxidesemiconductor film. As the number of spins per unit area is small, theamount of oxygen vacancies in the oxide semiconductor film is small.

According to FIG. 21 , the number of spins per unit area in Sample C2and that in Sample C3 are smaller than that in Sample C1. Thus, with useof the method for forming the protective film 23 described in Embodiment1 for formation of a silicon oxynitride film over the oxidesemiconductor film, oxygen vacancies in the oxide semiconductor film,which are generated due to formation of the silicon oxynitride film, canbe further reduced.

In addition, samples were manufactured. In each of the samples, asilicon oxynitride was formed in such a manner that the power forforming silicon oxynitride was constant at 1500 W (0.25 W/cm²) and theflow rate of silane was 120 sccm or 200 sccm. The sample formed with aflow rate of silane of 120 sccm is Sample C4, and the sample formed witha flow rate of silane of 200 sccm is Sample C5.

ESR measurement was performed on Sample C2, Sample C4 to Sample C5 underthe conditions similar to the above. The results are shown in FIG. 22 .FIG. 22 shows a relation between the flow rate of silane supplied toform the silicon oxynitride film and the number of spins per unit areaof a signal at g=1.93 in the oxide semiconductor film.

According to FIG. 22 , as the flow rate of silane in formation of thesilicon oxynitride film is increased, the number of spins per unit areatends to be decreased. Thus, by forming the silicon oxynitride film overthe oxide semiconductor film with a high flow rate of silane, oxygenvacancies in the oxide semiconductor film, which are generated due toformation of the silicon oxynitride film, can be further reduced.

Next, heat treatment was performed on Sample C2, Sample C4, and SampleC5 at 300° C., and then ESR measurement was performed thereon. From theresults of the measurement, it is found that in each of Sample C2,Sample C4, and Sample C5, the number of spins per unit area of a signalat g=1.93, which is due to oxygen vacancies in the IGZO film, was lowerthan a lower limit of the detection (1.0×10¹² spins/cm²).

Accordingly, it is found that oxygen vacancies in the oxidesemiconductor film can be reduced when heat treatment is performed afterthe silicon oxynitride film is formed over the oxide semiconductor filmwith use of the method for forming the protective film 23 described inEmbodiment 1.

Next, CPM measurement results will be described. Samples which weremanufactured are described below.

First, an oxide semiconductor film was formed over a substrate which wasa glass substrate.

As the oxide semiconductor film, an IGZO film which was a CAAC-OS filmwas formed by a sputtering method, a mask is formed over the IGZO filmby a photolithography step, and part of the IGZO film was etched withuse of the mask. Then, the etched IGZO film was subjected to heattreatment, so that the oxide semiconductor film was formed. Note that inthis example, a 100-nm-thick IGZO film was formed.

The IGZO film was formed in such a manner that a sputtering target whereIn:Ga:Zn=1:1:1 (atomic ratio) was used, argon and oxygen were suppliedas a sputtering gas into a treatment chamber of a sputtering apparatusat a flow rate of 50 sccm for each, and film formation was performed ata DC power of 5 kW with the pressure in the treatment chamber adjustedto 0.7 Pa. Note that the IGZO film was formed at a substrate temperatureof 170° C.

The heat treatment performed on the etched IGZO film includes first heattreatment in a nitrogen atmosphere and second heat treatment in anatmosphere of nitrogen and oxygen, which follows the first heattreatment. The temperature of each of the first heat treatment and thesecond heat treatment was 450° C., and treatment time for each of thefirst heat treatment and the second heat treatment was 1 hour.

Next, a pair of electrodes was formed to be in contact with the oxidesemiconductor film.

A conductive film was formed over the oxide semiconductor film, a maskwas formed over the conductive film by a photolithography step, and partof the conductive film was etched with use of the mask, so that the pairof electrodes was formed. Note that the conductive film had such astructure that a 400-nm-thick aluminum film was formed over a100-nm-thick titanium film and a 100-nm-thick titanium film was formedover the aluminum film.

Next, heat treatment was performed. The heat treatment was performed at300° C. in an atmosphere of oxygen and nitrogen for 1 hour.

Then, an insulating film was formed over the oxide semiconductor filmand the pair of electrodes.

As the insulating film, a silicon oxynitride film was formed by themethod for forming the protective film 23 described in Embodiment 1.Specifically, a 400-nm-thick silicon oxynitride film was formed in afollowing manner: silane and dinitrogen monoxide were supplied at 160sccm and 4000 sccm, respectively, were supplied to a treatment chamberof a plasma CVD apparatus; the pressure of the treatment chamber wasadjusted to 200 Pa; and a power of 1500 W (0.25 W/cm²) was supplied witha high-frequency power of 27.12 MHz. Further, the substrate at which theinsulating film was formed was 220° C.

After the insulating film is formed, the structure obtained through thesteps up to here was subjected to heat treatment. The heat treatment wasperformed at 300° C. in an atmosphere of oxygen and nitrogen for 1 hour.

The sample obtained through the above steps is Sample C6.

Here, steps for manufacturing a sample which is a comparative exampleare described. The sample of a comparative example (hereinafter,referred to as Sample C7) is a transistor in which an insulating film isformed by the following manner but the other steps are the same as thoseof Sample C6. As the insulating film in Sample C7, a 400-nm-thicksilicon oxynitride film was formed under the conditions where silane anddinitrogen monoxide were supplied at 30 sccm and 4000 sccm,respectively, to a treatment chamber of a plasma CVD apparatus; thepressure of the treatment chamber was adjusted to 200 Pa; and a power of150 W (0.025 W/cm²) was supplied with a high-frequency power of 27.12MHz. Further, the substrate at which the insulating film was formed was220° C.

Next, CPM measurement was performed on Sample C6 and Sample C7. CPMmeasurement is carried out in such a manner that the amount of lightwith which a surface of a sample is irradiated is adjusted in the statewhere voltage is applied between a pair of electrodes included in thesample so that a photocurrent value is kept constant, and an absorptioncoefficient is calculated from the amount of the irradiation light. Inthe CPM measurement, when the sample has a defect, the absorptioncoefficient of energy which corresponds to a level at which the defectexists (calculated from a wavelength) is increased. The increase in theabsorption coefficient is multiplied by a constant, whereby the defectdensity of the sample can be estimated.

An absorption coefficient shown in FIG. 23 was obtained by removing anabsorption coefficient due to the band tail from an absorptioncoefficient obtained by CPM measurement of Sample C6 and Sample C7. Thatis, an absorption coefficient due to defects is shown in FIG. 23 . InFIG. 23 , the horizontal axis indicates the absorption coefficient, andthe vertical axis indicates the photon energy. On the vertical axis inFIG. 23 , the bottom of the conduction band of the oxide semiconductorfilm is set to 0 eV, and the top of the valence band is set to 3.15 eV.Each curve in FIG. 23 represents a relation between the absorptioncoefficient and photon energy, which corresponds to defect levels. Thecurve indicated by a solid line corresponds to the defect level ofSample C6, and the curve indicated by a dashed line corresponds to thedefect level of Sample C7. The absorption coefficient due to defectlevel of Sample C6 is 1.00×10⁻²/cm, and the absorption coefficient dueto defect level of Sample C7 is 6.52×10⁻²/cm.

According to FIG. 23 , the defect levels of Sample C6 are lower thanthose of Sample C7.

The above results indicate that oxygen vacancies in the oxidesemiconductor film, which are generated due to formation of the siliconoxynitride film, can be further reduced when the flow rate of silanesupplied to form the silicon oxynitride film over the oxidesemiconductor film is increased and the supplied power is increased.

According to the above, with use of the method for forming theprotective film 23 described in Embodiment 1 for formation of a siliconoxynitride film as a protective film over a transistor including anoxide semiconductor film, a transistor with excellent electriccharacteristics can be provided.

Example 4

In this example, electric characteristics of a semiconductor devicewhich is one embodiment of the present invention will be described.Specifically, measurement results of current-voltage characteristics ofa transistor which is one embodiment of the present invention will bedescribed.

First, steps of forming a transistor are described. In this example, thesteps are described with reference to FIGS. 4A to 4E.

First, a glass substrate was used as the substrate 11, and the gateelectrode 15 was formed over the substrate 11.

A 100-nm-thick tungsten film was formed by a sputtering method. A maskwas formed over the tungsten film by a photolithography step, and partof the tungsten film was etched with use of the mask, so that the gateelectrode 15 was formed.

Next, the gate insulating film 33 including the insulating film 31 andthe insulating film 32 was formed over the gate electrode 15.

As the insulating film 31, a 50-nm-thick silicon nitride film wasformed, and as the insulating film 32, a 200-nm-thick silicon oxynitridefilm was formed. The silicon nitride film was formed in the followingmanner: silane and nitrogen were supplied at 50 sccm and 5000 sccm,respectively, into a treatment chamber of a plasma CVD apparatus; thepressure of the treatment chamber was adjusted to 60 Pa; and a power of150 W was supplied with a high-frequency power supply of 27.12 MHz. Thesilicon oxynitride film was formed in the following manner: silane anddinitrogen monoxide were supplied at 20 sccm and 3000 sccm,respectively, into the treatment chamber of the plasma CVD apparatus;the pressure of the treatment chamber was adjusted to 40 Pa; and a powerof 100 W was supplied with a high-frequency power supply of 27.12 MHz.Note that each of the silicon nitride film and the silicon oxynitridefilm was formed at a substrate temperature of 350° C.

As the structure obtained through the steps up to here, FIG. 4A can bereferred to. Note that although the base insulating film 13 isillustrated in FIG. 4A, the base insulating film 13 was not formed inthis example.

Next, the oxide semiconductor film 19 was formed to overlap with thegate electrode 15 with the gate insulating film 33 interposedtherebetween.

Here, as the oxide semiconductor film 19, an IGZO film which is aCAAC-OS film was formed by a sputtering method.

The IGZO film was formed in such a manner that a sputtering target whereIn:Ga:Zn=1:1:1 (atomic ratio) was used, argon (50 sccm) and oxygen (50sccm) were supplied as a sputtering gas into a treatment chamber of asputtering apparatus, the pressure in the treatment chamber was adjustedto 0.6 Pa, and a direct-current power of 5 kW was supplied. Note thatthe IGZO film was formed at a substrate temperature of 170° C.

Next, a mask was formed over the IGZO film by a photolithography step,and part of the IGZO film was etched with use of the mask. Then, theetched IGZO film was subjected to heat treatment, so that the oxidesemiconductor film 19 was formed. Note that the IGZO film formed in thisexample has a thickness of 35 nm.

As the heat treatment performed on the etched IGZO film, first heattreatment was performed in a nitrogen atmosphere, and second heattreatment was performed in an atmosphere of nitrogen and oxygen afterthe first heat treatment. The temperature of each of the first heattreatment and the second heat treatment was 350° C., and treatment timefor each of the first heat treatment and the second heat treatment was 1hour.

The structure obtained through the steps up to here is illustrated inFIG. 4B.

Next, the pair of electrodes 21 in contact with the oxide semiconductorfilm 19 was formed.

A conductive film was formed over the gate insulating film 17 and theoxide semiconductor film 19. A mask was formed over the conductive filmby a photolithography step, and part of the conductive film was etchedwith use of the mask, so that the pair of electrodes 21 was formed. Notethat as the conductive film, a 400-nm-thick aluminum film was formedover a 50-nm-thick tungsten film, and a 100-nm-thick titanium film wasformed over the aluminum film. After that, the mask is removed.

As the structure obtained through the steps up to here, FIG. 4C can bereferred to. Note that in this example, treatment in which exposure toplasma generated in an oxygen atmosphere as illustrated in FIG. 4C wasnot performed.

Next, heat treatment was performed on an object obtained through thesteps up to here. The heat treatment was performed at 300° C. in anatmosphere containing oxygen and nitrogen for 1 hour.

Next, the insulating film 34 was formed over the gate insulating film17, the oxide semiconductor film 19, and the pair of electrodes 21.Then, the insulating film 34 was subjected to oxygen plasma treatment,so that the oxygen 35 was added to the insulating film 34.

In this example, as the insulating film 34, a 30-nm-thick siliconoxynitride film was formed in the following manner: silane anddinitrogen monoxide were supplied at 20 sccm and 3000 sccm,respectively, into a treatment chamber of a plasma CVD apparatus; thepressure of the treatment chamber was adjusted to 200 Pa; and a power of100 W was supplied with a high-frequency power supply of 27.12 MHz. Thesubstrate temperature at which the insulating film 34 was formed was350° C.

Further, oxygen plasma was generated under such conditions that oxygenwas supplied at 250 sccm to the treatment chamber of the plasmatreatment apparatus, the pressure of the treatment chamber was adjustedto 15 Pa, the bias voltage was set to 0 W, and a power of 4500 W wassupplied to a source electrode. The insulating film 34 was exposed tothe oxygen plasma for 600 seconds.

As the structure obtained through the steps up to here, FIG. 4D can bereferred to.

Next, the insulating film 36 was formed over the insulating film 34 towhich the oxygen 35 had been added.

As the insulating film 36, a silicon oxynitride film was formed by themethod for forming the protective film 23 described in Embodiment 1.Specifically, a 370-nm-thick silicon oxynitride film was formed in afollowing manner: silane and dinitrogen monoxide were supplied at 160sccm and 4000 sccm, respectively, into a treatment chamber of a plasmaCVD apparatus; the pressure of the treatment chamber was adjusted to 200Pa; and a power of 1500 W (0.25 W/cm²) was supplied with ahigh-frequency power supply of 27.12 MHz. The substrate temperature atwhich the insulating film 36 was formed was 220° C.

After the insulating film 36 was formed, the structure obtained throughsteps up to here was subjected to heat treatment. The heat treatment wasperformed at 350° C. in an atmosphere containing oxygen and nitrogen for1 hour.

Through the above steps, a transistor which is one embodiment of thepresent invention was formed. Note that the transistor formed throughthe above steps is Sample D1.

Here, steps of forming a transistor as a comparative example aredescribed. The transistor which is a comparative example (hereinafter,referred to as Sample D2) is a transistor in which the insulating film36 is formed by a step described below, and the other steps are the sameas those of forming Sample D1. As the insulating film 36 in Sample D2, a370-nm-thick silicon oxynitride film was formed in the following manner:silane and dinitrogen monoxide were supplied at 30 sccm and 4000 sccm,respectively, into a treatment chamber of a plasma CVD apparatus; thepressure of the treatment chamber was adjusted to 200 Pa; and a power of150 W (0.025 W/cm²) was supplied with a high-frequency power supply of27.12 MHz. The substrate temperature at which the insulating film 36 wasformed was 350° C.

Then, initial characteristics of current-voltage characteristics ofSample D1 and Sample D2 were measured. FIGS. 24A and 24B show theresults thereof. FIG. 24A shows initial characteristics ofcurrent-voltage characteristics of Sample D1, and FIG. 24B shows initialcharacteristics of current-voltage characteristics of Sample D2. In eachof FIGS. 24A and 24B, the horizontal axis indicates the gate voltage(Vg), the left vertical axis indicates the drain current (Id) flowingbetween the pair of electrodes 21, and the right vertical axis indicatesthe field effect mobility (μFE). Further, the bold solid line indicatesthe initial characteristics of current-voltage characteristics at adrain voltage (Vd) of 10 V, the thick dashed line indicates the initialcharacteristics of current-voltage characteristics at a drain voltage of1 V, and the thin solid line indicates the field effect mobility withrespect to the gate voltage at a drain voltage of 10 V. Note that thefield effect mobility was obtained by operation of each sample in asaturation region.

According to FIG. 24B, the threshold voltage of Sample D2 largely shiftsin the negative direction, and thus Sample D2 has normally-oncharacteristics. On the other hand, according to FIG. 24A, the thresholdvoltage of Sample D1 is around 0 V (Vg); thus, normally-offcharacteristics found in Sample D2 are overcome.

Further, in the case of Sample D2, the rising voltage of on-statecurrent when the drain voltage is 1 V is different from that when thedrain voltage is 10 V. On the other hand, in the case of Sample D1, therising voltage of on-state current when the drain voltage is 1 V issubstantially the same as that when the drain voltage is 10 V.

As described above, Sample D1 formed by the method for forming theprotective film 23 described in Embodiment 1 can be confirmed to haveexcellent characteristics. Therefore, according to one embodiment of thepresent invention, a transistor having excellent electriccharacteristics can be provided.

Example 5

In this example, a relation between the electric characteristics of asemiconductor device which is one embodiment of the present inventionand the defect density of an insulating film which is one embodiment ofthe present invention will be described. Specifically, description willbe made on measurement results of initial characteristics ofcurrent-voltage characteristics of a transistor which is one embodimentof the present invention, the amount of hysteresis obtained by C-Vmeasurement of an element with a structure similar to that of thetransistor, and the defect density of a silicon oxynitride film that isan insulating film of one embodiment of the present invention.

First, steps of forming the transistor are described. In this example,the steps are described with reference to FIGS. 2A to 2D.

First, a glass substrate was used as the substrate 11, and the gateelectrode 15 was formed over the substrate 11.

A 100-nm-thick tungsten film was formed by a sputtering method, a maskwas formed over the tungsten film by a photolithography step, and partof the tungsten film was etched with use of the mask, so that the gateelectrode 15 was formed.

Next, the gate insulating film 17 was formed over the gate electrode 15.

As the gate insulating film 17, a stacked layer including a 50-nm-thicksilicon nitride film and a 200-nm-thick silicon oxynitride film wasformed. The silicon nitride film was formed in the following manner:silane and nitrogen were supplied at 50 sccm and 5000 sccm,respectively, to a treatment chamber of a plasma CVD apparatus; thepressure in the treatment chamber was adjusted to 60 Pa; and a power of150 W was supplied with a high-frequency power supply of 27.12 MHz.

As the silicon oxynitride film, a 10-nm-thick silicon oxynitride filmwas formed by a plasma CVD method using a microwave. Note thatconditions of the plasma CVD method using a microwave are as follows. Inorder to stabilize plasma generated in a treatment chamber of amicrowave plasma CVD apparatus, first, silane, dinitrogen monoxide, andargon were introduced at 10 sccm, 300 sccm, and 2500 sccm, respectively,to the treatment chamber, the pressure in the treatment chamber wasadjusted to 20 Pa, the substrate temperature was kept at 325° C., and apower of 5 kW was supplied with a microwave power supply of 2.45 GHz.After the generated plasma was stabilized, the flow rates of silane,dinitrogen monoxide, and argon introduced into the treatment chamberwere increased to 30 sccm, 1500 sccm, and 2500 sccm, respectively, sothat the silicon oxynitride film was formed.

Next, the oxide semiconductor film 19 was formed to overlap with thegate electrode 15 with the gate insulating film 17 interposedtherebetween.

Over the gate insulating film 17, an IGZO film which was a CAAC-OS filmwas formed by a sputtering method.

The IGZO film was formed in such a manner that a sputtering target whereIn:Ga:Zn=1:1:1 (atomic ratio) was used, argon and oxygen were suppliedas a sputtering gas into a treatment chamber of a sputtering apparatusat a flow rate of 50 sccm for each, and film formation was performed ata DC power of 5 kW with the pressure in the treatment chamber adjustedto 0.6 Pa. Note that the IGZO film was formed at a substrate temperatureof 170° C.

As the structure obtained through the steps up to here, FIG. 2A can bereferred to. Note that although the base insulating film 13 isillustrated in FIG. 2A, the base insulating film 13 was not formed inthis example.

Next, a mask was formed over the IGZO film by a photolithography step,and part of the IGZO film was etched with use of the mask. Then, theetched IGZO film was subjected to heat treatment, so that the oxidesemiconductor film 19 was formed. Note that in this example, a35-nm-thick IGZO film was formed.

The heat treatment performed on the etched IGZO film includes first heattreatment performed in a nitrogen atmosphere and second heat treatmentperformed in an atmosphere of nitrogen and oxygen, which follows thefirst heat treatment. The temperature of each of the first heattreatment and the second heat treatment was 450° C., and treatment timefor each of the first heat treatment and the second heat treatment was 1hour.

As the structure obtained through the steps up to here, FIG. 2B can bereferred to.

Next, the pair of electrodes 21 in contact with the oxide semiconductorfilm 19 was formed.

A conductive film was formed over the gate insulating film 17 and theoxide semiconductor film 19, a mask was formed over the conductive filmby a photolithography step, and part of the conductive film was etchedwith use of the mask, so that the pair of electrodes 21 was formed. Notethat the conductive film had a stacked structure in which a 400-nm-thickaluminum film was formed over the 100-nm-thick titanium film and a100-nm-thick titanium film was formed over the aluminum film.

As the structure obtained through the steps up to here, FIG. 2C can bereferred to.

Next, heat treatment was performed on an object obtained through thesteps up to here. The heat treatment was performed at 300° C. in anatmosphere of oxygen and nitrogen for 1 hour.

Next, the protective film 23 was formed over the gate insulating film17, the oxide semiconductor film 19, and the pair of electrodes 21.

In this example, as the protective film 23, a 370-nm-thick siliconoxynitride film was formed in the following manner: silane anddinitrogen monoxide were supplied at 200 sccm and 3000 sccm,respectively, to a treatment chamber of a plasma CVD apparatus; thepressure in the treatment chamber was adjusted to 200 Pa; and a power of1500 W was supplied with a high-frequency power supply of 27.12 MHz. Thesubstrate temperature at which the protective film 23 was formed was220° C.

As the structure obtained through the steps up to here, FIG. 2D can bereferred to.

After the protective film 23 was formed, the structure obtained throughsteps up to here was subjected to heat treatment. The heat treatment wasperformed at 300° C. in an atmosphere of oxygen and nitrogen for 1 hour.

Next, a planarization film (not illustrated) was formed over theprotective film 23. Here, the protective film 23 was coated with acomposition, and exposure and development were performed, so that aplanarization film having an opening through which the pair ofelectrodes is partly exposed was formed. Note that as the planarizationfilm, a 1.5-μm-thick acrylic resin was formed. Then, heat treatment wasperformed. The heat treatment was performed at a temperature of 250° C.in a nitrogen atmosphere for 1 hour.

Next, a conductive film connected to part of the pair of electrodes isformed (not illustrated). Here, a 100-nm-thick ITO film containingsilicon oxide was formed as the conductive film by a sputtering method.Then, heat treatment was performed. The heat treatment was performed ata temperature of 250° C. in a nitrogen atmosphere for 1 hour.

Through the above-described steps, the transistor was formed. Note thatthe transistor formed through the above steps is Sample E1.

Other transistors were formed. In each of the transistors, theprotective film 23 was formed using silane whose flow rate was differentfrom that in Sample E1.

A transistor in which the protective film 23 was formed using silanewith a flow rate of 160 sccm is Sample E2.

A transistor in which the protective film 23 was formed using silanewith a flow rate of 120 sccm is Sample E3.

Another transistor was formed. In the transistor, the protective film 23was formed under such conditions that the flow rate of silane and thesupplied power were different from those in Sample E1.

A transistor in which the protective film 23 was formed using silanewith a flow rate of 30 sccm and a power of 150 W is Sample E4.

Note that in each of Sample E2 to Sample E4, the base insulating film 13illustrated in FIG. 2A was formed. Further, the gate insulating film 17was formed to have a single layer of a silicon oxynitride film without asilicon nitride film.

Then, initial characteristics of current-voltage characteristics ofSample E1 to Sample E4 were measured. FIGS. 25A to 25D show the resultsthereof. FIG. 25A shows initial characteristics of current-voltagecharacteristics of Sample E1, FIG. 25B shows initial characteristics ofcurrent-voltage characteristics of Sample E2, FIG. 25C shows initialcharacteristics of current-voltage characteristics of Sample E3, andFIG. 25D shows initial characteristics of current-voltagecharacteristics of Sample E4. In each of FIGS. 25A to 25D, thehorizontal axis indicates the gate voltage (Vg), the left vertical axisindicates the drain current (Id) flowing between the pair of electrodes21, and the right vertical axis indicates the field effect mobility(μFE). Further, the solid line indicates the initial characteristics ofcurrent-voltage characteristics at a drain voltage (Vd) of 1 V or 10V,and the dashed line indicates the field effect mobility with respect tothe gate voltage at a drain voltage of 10 V. Note that the field effectmobility was obtained by operation of each sample in a saturationregion.

As the initial characteristics of current-voltage characteristics shownin each of FIGS. 25B and 25C, the rising voltage of on-state currentwhen the drain voltage is 1 V and the rising voltage of on-state currentwhen the drain voltage is 10 V are different from each other. As theinitial characteristics of current-voltage characteristics shown in FIG.25D, the threshold voltage shifts in the negative direction and varies.On the other hand, as the initial characteristics of current-voltagecharacteristics shown in FIG. 25A, the rising voltage of on-statecurrent when the drain voltage is 1 V is substantially the same as thatwhen the drain voltage is 10 V. In addition, the threshold voltage isaround 0 V (Vg) and does not vary.

Next, film characteristics of the protective films 23 formed under theconditions of Sample E1 to Sample E4 are described. In this example,metal oxide semiconductor (MOS) elements were formed, andcapacitance-voltage (C-V) measurement was conducted thereon. The resultsare shown in FIGS. 27A to 27D.

First, steps of manufacturing MOS elements for C-V measurement aredescribed. In this example, the steps are described with reference toFIG. 26 .

As illustrated in FIG. 26 , a first electrode 963 was formed over asubstrate 961. A glass substrate was used as the substrate 961. Thefirst electrode 963 was formed under the same conditions as the gateelectrode 15 formed in each of Sample E1 to Sample E4.

An insulating film 965 was formed over the substrate 961 and the firstelectrode 963. The insulating film 965 was formed under the sameconditions as the gate insulating film 17 formed in each of Sample E1 toSample E4.

An oxide semiconductor film 967 was formed over the insulating film 965.The oxide semiconductor film 967 was formed under the same conditions asthe oxide semiconductor film 19 formed in each of Sample E1 to SampleE4.

A second electrode 969 was formed over the oxide semiconductor film 967.The second electrode 969 was formed under the same conditions as thepair of electrodes 21 formed in each of Sample E1 to Sample E4.

An insulating film 971 was formed over the insulating film 965, theoxide semiconductor film 967, and the second electrode 969. Theinsulating film 971 was formed under the same conditions as theprotective films 23 formed in each of Sample E1 to Sample E4.

Through the above steps, MOS elements for C-V measurement were formed.Note that the MOS element formed under the same conditions as Sample E1is Sample E5, the MOS element formed under the same conditions as SampleE2 is Sample E6, the MOS element formed under the same conditions asSample E3 is Sample E7, and the MOS element structure formed under thesame conditions as Sample E4 is Sample E8.

FIGS. 27A to 27D respectively show the C-V measurement results of SampleE5 to Sample E8. Further, Table 1 shows the amount of hysteresis (ΔVfb)of each sample. The amount of hysteresis is an absolute value of adifference between a flat-band voltage Vfb1 when the voltage V of thefirst electrode 963 was swept from −10 V to 10 V and a flat-band voltageVfb2 when the voltage V of the first electrode 963 was swept from 10 Vto −10 V.

TABLE 1 Sample E1 Sample E2 Sample E3 Sample E4 ΔVfb (V) 1.17 2.86 6.930.2

According to FIGS. 27A to 27C and Table 1, as the amount of hysteresis(ΔVfb) is increased, the difference in the rising voltage of theon-state current between the case of the drain voltage of 1 V and thecase of 10 V is increased as shown in FIGS. 25A to 25C. Thus, as theinitial characteristics of the current-voltage characteristics of thetransistor, the rising voltage of the on-state current is related to theamount of hysteresis (ΔVfb).

Further, the defect densities of the protective films 23 formed inSample E1 to Sample E4 are described with ESR measurement resultsthereof.

Samples which were manufactured are described below. First, a400-nm-thick silicon oxynitride film was formed over a quartz substrateunder the same conditions as the protective film 23 in each of Sample E1to Sample E4. Then, heat treatment was performed at 300° C. in anatmosphere containing nitrogen and oxygen for 1 hour.

The sample in which the silicon oxynitride film was formed under thesame conditions as the protective film 23 in Sample E1 is Sample E9. Thesample in which the silicon oxynitride film was formed under the sameconditions as the protective film 23 in Sample E2 is Sample E10. Thesample in which the silicon oxynitride film was formed under the sameconditions as the protective film 23 in Sample E3 is Sample E11. Thesample in which the silicon oxynitride film was formed under the sameconditions as the protective film 23 in Sample E4 is Sample E12.

Next, Sample E9 to Sample E12 were subjected to ESR measurement. The ESRmeasurement was performed under the following conditions. Themeasurement temperature was room temperature (25° C.), a high-frequencypower (power of microwaves) of 9.2 GHz was 20 mW, and the direction of amagnetic field was parallel to a surface of each of the siliconoxynitride films in Sample E9 to Sample E12. The lower limit of thedetection of the spin density of a signal at g=2.001 which is due todangling bonds of silicon in the silicon oxynitride film is 1.0×10¹⁵spins/cm².

FIGS. 28A to 28D show the ESR measurement results. Specifically, FIGS.28A to 28D show first derivative curves of the silicon oxynitride filmsin Sample E9 to Sample E12, respectively. According to FIGS. 27A to 27Dand FIGS. 28A to 28D, as the ΔVfb becomes small, the signal intensity ata g-factor of 2.001 becomes small. Thus, when the insulating film 971 isa film with fewer defects, the amount of hysteresis in C-V measurementcan be decreased, and excellent characteristics of the transistor can beobtained: the rising voltage of the on-state current when the drainvoltage is 1 V is the substantially same as the rising voltage of theon-state current when the drain voltage is 10 V.

Next, MOS elements which have a structure similar to those of Sample E5to Sample E8 were formed. However, in each of the MOS elements, theinsulating film 971 was formed under different conditions from Sample E5to Sample E8. In addition, samples for ESR measurement, which have astructure similar to those of Sample E9 to Sample E12 were formed.However, in each of the samples, the silicon oxynitride film was formedunder different conditions from Sample E9 to Sample E12.

Next, C-V measurement was conducted on each MOS element. Further, ESRmeasurement was conducted on each sample for ESR measurement.

FIG. 29 shows a relation between the spin densities of signals atg=2.001 and the amount of hysteresis. Here, the spin densities wereobtained from Sample E5 to Sample E8 and the MOS elements including theinsulating film 971 formed under the different conditions from Sample E5to Sample E8. The amount of hysteresis was obtained from Sample E9 toSample E12 and the samples for ESR measurement which include the siliconoxynitride film formed under the different conditions from Sample E9 toSample E12.

According to FIGS. 25A to 25D and FIGS. 27A to 27D, the preferableamount of hysteresis (ΔVfb) is 2.0 V or lower, in which case the risingvoltage of the on-state current when the drain voltage is 1 V is thesubstantially same as that when the drain voltage is 10 V. Further,according to FIG. 29 , the spin density of a signal at g=2.001, whichsatisfies the above amount of hysteresis, is lower than 1.5×10¹⁸spins/cm³, preferably lower than or equal to 1.0×10¹⁸ spins/cm³.

Accordingly, an oxide insulating film in which the spin density of asignal at g=2.001, measured by electron spin resonance, is lower than1.5×10¹⁸ spins/cm³, preferably lower than or equal to 1.0×10¹⁸ spins/cm³is provided as a protective film over a transistor, in which case atransistor with excellent electric characteristics can be manufactured.

EXPLANATION OF REFERENCE

-   10: transistor, 11: substrate, 13: base insulating film, 15: gate    electrode, 17: gate insulating film, 18: oxide semiconductor film,    19: oxide semiconductor film, 20: oxide semiconductor film, 21:    electrode, 22: oxygen, 23: protective film, 30: transistor, 31:    insulating film, 32: insulating film, 33: gate insulating film, 34:    insulating film, 35: oxygen, 36: insulating film, 37: protective    film, 100: transistor, 101: substrate, 103: base insulating film,    105: oxide semiconductor film, 107: electrode, 109: gate insulating    film, 110: opening, 111: gate electrode, 113: protective film, 115:    wiring, 120: transistor, 121: oxide semiconductor film, 123: region,    125: region, 127: region, 130: transistor, 131: oxide semiconductor    film, 133: region, 135: region, 137: region, 139: electrode, 140:    transistor, 141: sidewall insulating film, 150: transistor, 151:    sidewall insulating film, 160: transistor, 161: oxide semiconductor    film, 163: region, 165: region, 167: region, 169: region, 170:    transistor, 171: gate electrode, 191: substrate, 210: transistor,    211: oxide semiconductor film, 213: region, 215: region, 17:    protective film, 219: wiring, 220: transistor, 221: sidewall    insulating film, 223: gate insulating film, 225: electrode, 230:    transistor, 231: gate electrode, 233: insulating film, 701:    substrate, 702: STI, 704 a: transistor, 704 b: transistor, 704 c;    transistor, 705: impurity region, 706: gate insulating film, 707:    gate electrode, 708: gate electrode, 709: insulating film, 710:    sidewall insulating film, 711: insulating film, 712: insulating    film, 713: insulating film, 714 a: contact plug, 714 b: contact    plug, 715: insulating film, 716: insulating film, 717: barrier film,    718: wiring, 719: barrier film, 720: insulating film, 721:    insulating film, 722: barrier film, 723: wiring, 724: barrier film,    725 a: insulating film, 725 b: insulating film, 726: gate insulating    film, 727: insulating film, 728: insulating film, 729: insulating    film, 730 a: contact plug, 730 b: contact plug, 731: insulating    film, 732: insulating film, 733: barrier film, 734 a: wiring, 734 b:    wiring, 735: barrier film, 740: protective film, 750: transistor,    751: gate electrode, 801: transistor, 803: transistor, 804:    transistor, 805: transistor, 806: transistor, 807: X decoder, 808: Y    decoder, 811: transistor, 812: storage capacitor, 813: X decoder,    814: Y decoder, 901: RF circuit, 902: analog baseband circuit, 903:    digital baseband circuit, 904: battery, 905: power supply circuit,    906: application processor, 907: CPU, 908: DSP, 910: flash memory,    911: display controller, 912: memory circuit, 913: display, 914:    display portion, 915: source driver, 916: gate driver, 917: audio    circuit, 918: keyboard, 919: touch sensor, 950: memory circuit, 951:    memory controller, 952: memory, 953: memory, 954: switch, 955:    switch, 956: display controller, 957: display, 961: substrate, 963:    electrode, 965: insulating film, 967: oxide semiconductor film, 969:    electrode, 971: insulating film, 1001: battery, 1002: power supply    circuit, 1003: microprocessor, 1004: flash memory, 1005: audio    circuit, 1006: keyboard, 1007: memory circuit, 1008: touch panel,    1009: display, 1010: display controller

This application is based on Japanese Patent Application serial no.2012-087432 filed with Japan Patent Office on Apr. 6, 2012, and JapanesePatent Application serial no. 2012-156492 filed with Japan Patent Officeon Jul. 12, 2012, the entire contents of which are hereby incorporatedby reference.

1. A method for manufacturing a semiconductor device, comprising the step of holding a substrate placed in a treatment chamber at a first temperature, introducing a source gas into the treatment chamber, and supplying a high-frequency power to an electrode in the treatment chamber so that an insulating film is formed over the substrate, wherein the first temperature is higher than or equal to 180° C. and lower than or equal to 260° C., wherein a pressure in the treatment chamber is set to be higher than or equal to 100 Pa and lower than or equal to 250 Pa when the source gas is introduced, and wherein the high-frequency power is higher than or equal to 0.17 W/cm² and lower than or equal to 0.5 W/cm². 